[llvm-commits] [llvm] r157662 - /llvm/trunk/lib/CodeGen/IfConversion.cpp

[Evan Cheng]

Author: evancheng
Date: Tue May 29 19:42:02 2012
New Revision: 157662

URL: http://llvm.org/viewvc/llvm-project?rev=157662&view=rev
Log:
If-converter models predicated defs as read + write. The read should be marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs.

Modified:
    llvm/trunk/lib/CodeGen/IfConversion.cpp

Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=157662&r1=157661&r2=157662&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp Tue May 29 19:42:02 2012
@@ -993,7 +993,8 @@
       if (AddImpUse)
         // Treat predicated update as read + write.
         MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
-                                                true/*IsImp*/,false/*IsKill*/));
+                                              true/*IsImp*/,false/*IsKill*/,
+                                              false/*IsDead*/,true/*IsUndef*/));
     } else {
       Redefs.insert(Reg);
       for (const uint16_t *SR = TRI->getSubRegisters(Reg); *SR; ++SR)