[llvm-commits] [llvm] r157292 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

[NAKAMURA Takumi]

Author: chapuni
Date: Tue May 22 16:47:02 2012
New Revision: 157292

URL: http://llvm.org/viewvc/llvm-project?rev=157292&view=rev
Log:
ARMDisassembler.cpp: Fix utf8 char in comments.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=157292&r1=157291&r2=157292&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Tue May 22 16:47:02 2012
@@ -3339,13 +3339,13 @@
 
 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Val,
                                  uint64_t Address, const void *Decoder) {
-  // Val is passed in as S:J1:J2:imm10H:imm10L:’0’
+  // Val is passed in as S:J1:J2:imm10H:imm10L:'0'
   // Note only one trailing zero not two.  Also the J1 and J2 values are from
   // the encoded instruction.  So here change to I1 and I2 values via:
   // I1 = NOT(J1 EOR S);
   // I2 = NOT(J2 EOR S);
   // and build the imm32 with two trailing zeros as documented:
-  // imm32 = SignExtend(S:I1:I2:imm10H:imm10L:’00’, 32);
+  // imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', 32);
   unsigned S = (Val >> 23) & 1;
   unsigned J1 = (Val >> 22) & 1;
   unsigned J2 = (Val >> 21) & 1;
@@ -3477,7 +3477,7 @@
   // I1 = NOT(J1 EOR S);
   // I2 = NOT(J2 EOR S);
   // and build the imm32 with one trailing zero as documented:
-  // imm32 = SignExtend(S:I1:I2:imm10:imm11:’0’, 32);
+  // imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', 32);
   unsigned S = (Val >> 23) & 1;
   unsigned J1 = (Val >> 22) & 1;
   unsigned J2 = (Val >> 21) & 1;