[llvm-commits] [llvm] r157144 - /llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Sat May 19 21:44:38 2012
New Revision: 157144

URL: http://llvm.org/viewvc/llvm-project?rev=157144&view=rev
Log:
Use LiveRangeQuery in ScheduleDAGInstrs.

Modified:
    llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp

Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=157144&r1=157143&r2=157144&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
+++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Sat May 19 21:44:38 2012
@@ -445,19 +445,11 @@
 
   // Lookup this operand's reaching definition.
   assert(LIS && "vreg dependencies requires LiveIntervals");
-  SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot();
-  LiveInterval *LI = &LIS->getInterval(Reg);
-  VNInfo *VNI = LI->getVNInfoBefore(UseIdx);
+  LiveRangeQuery LRQ(LIS->getInterval(Reg), LIS->getInstructionIndex(MI));
+  VNInfo *VNI = LRQ.valueIn();
 
-  // Special case: An early-clobber tied operand reads and writes the
-  // register one slot early. e.g. InlineAsm.
-  //
-  // FIXME: Same special case is in shrinkToUses. Hide under an API.
-  if (SlotIndex::isSameInstr(VNI->def, UseIdx)) {
-    UseIdx = VNI->def;
-    VNI = LI->getVNInfoBefore(UseIdx);
-  }
   // VNI will be valid because MachineOperand::readsReg() is checked by caller.
+  assert(VNI && "No value to read by operand");
   MachineInstr *Def = LIS->getInstructionFromIndex(VNI->def);
   // Phis and other noninstructions (after coalescing) have a NULL Def.
   if (Def) {