[llvm-commits] [llvm] r156989 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/CodeGen/ARM/smml.ll
Tim Northover
Tim.Northover at arm.com
Thu May 17 06:12:13 PDT 2012
Author: tnorthover
Date: Thu May 17 08:12:13 2012
New Revision: 156989
URL: http://llvm.org/viewvc/llvm-project?rev=156989&view=rev
Log:
Remove incorrect pattern for ARM SMML instruction.
Patch by Meador Inge.
Added:
llvm/trunk/test/CodeGen/ARM/smml.ll
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=156989&r1=156988&r2=156989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu May 17 08:12:13 2012
@@ -3554,8 +3554,7 @@
def SMMLS : AMul2Ia <0b0111010, 0b1101, (outs GPR:$Rd),
(ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
- IIC_iMAC32, "smmls", "\t$Rd, $Rn, $Rm, $Ra",
- [(set GPR:$Rd, (sub GPR:$Ra, (mulhs GPR:$Rn, GPR:$Rm)))]>,
+ IIC_iMAC32, "smmls", "\t$Rd, $Rn, $Rm, $Ra", []>,
Requires<[IsARM, HasV6]>;
def SMMLSR : AMul2Ia <0b0111010, 0b1111, (outs GPR:$Rd),
Added: llvm/trunk/test/CodeGen/ARM/smml.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/smml.ll?rev=156989&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/smml.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/smml.ll Thu May 17 08:12:13 2012
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
+define i32 @f(i32 %a, i32 %b, i32 %c) nounwind readnone ssp {
+entry:
+; CHECK-NOT: smmls
+ %conv4 = zext i32 %a to i64
+ %conv1 = sext i32 %b to i64
+ %conv2 = sext i32 %c to i64
+ %mul = mul nsw i64 %conv2, %conv1
+ %shr5 = lshr i64 %mul, 32
+ %sub = sub nsw i64 %conv4, %shr5
+ %conv3 = trunc i64 %sub to i32
+ ret i32 %conv3
+}
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