[llvm-commits] [llvm] r156829 - in /llvm/trunk: include/llvm/MC/MCRegisterInfo.h include/llvm/Target/Target.td utils/TableGen/RegisterInfoEmitter.cpp

[Jim Grosbach]

On May 15, 2012, at 11:20 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:

> 
> On May 15, 2012, at 10:35 AM, Jim Grosbach <grosbach at apple.com> wrote:
> 
>> Author: grosbach
>> Date: Tue May 15 12:35:57 2012
>> New Revision: 156829
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=156829&view=rev
>> Log:
>> TableGen'erate mapping physical registers to encoding values.
>> 
>> Many targets always use the same bitwise encoding value for physical
>> registers in all (or most) instructions. Add this mapping to the
>> .td files and TableGen'erate the information and expose an accessor
>> in MCRegisterInfo.
>> 
>> patch by Tom Stellard.
> 
> Nice. This should be useful for most targets.
> 
> ARM Registers synthesized with the RegisterTuples construct should already be inheriting their HWEncoding from their first member, which is probably what we want.

Yep. Once I get a couple other things taken care of, I'm planning to refactor away some ugly hand-coded helper bits in ARM using this.

-Jim