[llvm-commits] [llvm] r156772 - /llvm/trunk/docs/ReleaseNotes.html
Akira Hatanaka
ahatanaka at mips.com
Mon May 14 11:40:07 PDT 2012
Author: ahatanak
Date: Mon May 14 13:40:07 2012
New Revision: 156772
URL: http://llvm.org/viewvc/llvm-project?rev=156772&view=rev
Log:
Release notes for MIPS backend.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=156772&r1=156771&r2=156772&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon May 14 13:40:07 2012
@@ -635,12 +635,18 @@
</h3>
<div>
-
-<p>This release has seen major new work on just about every aspect of the MIPS
- backend. Some of the major new features include:</p>
+New features and major changes in the MIPS target include:</p>
<ul>
- <li>....</li>
+ <li>MIPS32 little-endian direct object code emission is functional.</li>
+ <li>MIPS64 little-endian code generation is largely functional for N64 ABI in assembly printing mode with the exception of handling of long double (f128) type.</li>
+ <li>Support for new instructions has been added, which includes swap-bytes
+ instructions (WSBH and DSBH), floating point multiply-add/subtract and
+ negative multiply-add/subtract instructions, and floating
+ point load/store instructions with reg+reg addressing (LWXC1, etc.)</li>
+ <li>Various fixes to improve performance have been implemented.</li>
+ <li>Post-RA scheduling is now enabled at -O3.</li>
+ <li>Support for soft-float code generation has been added.</li>
</ul>
</div>
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