[llvm-commits] [llvm] r156732 - /llvm/trunk/docs/ReleaseNotes.html

Bill Wendling isanbard at gmail.com
Sun May 13 02:59:27 PDT 2012


Author: void
Date: Sun May 13 04:59:27 2012
New Revision: 156732

URL: http://llvm.org/viewvc/llvm-project?rev=156732&view=rev
Log:
Add blurbs for pocl and TCE.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=156732&r1=156731&r2=156732&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Sun May 13 04:59:27 2012
@@ -308,6 +308,21 @@
 
 </div>
 
+<h3>Portable OpenCL (pocl)</h3>
+
+<div>
+
+<p>In addition to producing an easily portable open source OpenCL
+   implementation, another major goal pocl is improving performance portability
+   of OpenCL programs with compiler optimizations, reducing the need for
+   target-dependent manual optimizations. An important part of pocl is a set of
+   LLVM passes used to statically parallelize multiple work-items with the
+   kernel compiler, even in the presence of work-group barriers. This enables
+   static parallelization of the fine-grained static concurrency in the work
+   groups in multiple ways (SIMD, VLIW, superscalar,...).</p>
+
+</div>
+
 <h3>Pure</h3>
 
 <div>
@@ -329,6 +344,25 @@
 
 </div>
 
+<h3>TTA-based Co-design Environment (TCE)</h3>
+
+<div>
+
+<p>TCE is a toolset for designing application-specific processors (ASP) based on
+   the Transport triggered architecture (TTA). The toolset provides a complete
+   co-design flow from C/C++ programs down to synthesizable VHDL/Verilog and
+   parallel program binaries. Processor customization points include the
+   register files, function units, supported operations, and the interconnection
+   network.</p>
+
+<p>TCE uses Clang and LLVM for C/C++ language support, target independent
+   optimizations and also for parts of code generation. It generates new
+   LLVM-based code generators "on the fly" for the designed TTA processors and
+   loads them in to the compiler backend as runtime libraries to avoid
+   per-target recompilation of larger parts of the compiler chain.</p>
+
+</div>
+
 </div>
 
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