[llvm-commits] [llvm] r156524 - /llvm/trunk/utils/TableGen/CodeGenRegisters.cpp
Andrew Trick
atrick at apple.com
Wed May 9 17:32:15 PDT 2012
Author: atrick
Date: Wed May 9 19:32:15 2012
New Revision: 156524
URL: http://llvm.org/viewvc/llvm-project?rev=156524&view=rev
Log:
Fix TableGen's RegPressureSet weight normalization to handle subreg DAGS.
I initially assumed that the subreg graph was a tree. That may not be true.
Modified:
llvm/trunk/utils/TableGen/CodeGenRegisters.cpp
Modified: llvm/trunk/utils/TableGen/CodeGenRegisters.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenRegisters.cpp?rev=156524&r1=156523&r2=156524&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenRegisters.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenRegisters.cpp Wed May 9 19:32:15 2012
@@ -1053,17 +1053,21 @@
static bool normalizeWeight(CodeGenRegister *Reg,
std::vector<UberRegSet> &UberSets,
std::vector<UberRegSet*> &RegSets,
+ std::set<unsigned> &NormalRegs,
CodeGenRegister::RegUnitList &NormalUnits,
CodeGenRegBank &RegBank) {
bool Changed = false;
+ if (!NormalRegs.insert(Reg->EnumValue).second)
+ return Changed;
+
const CodeGenRegister::SubRegMap &SRM = Reg->getSubRegs();
for (CodeGenRegister::SubRegMap::const_iterator SRI = SRM.begin(),
SRE = SRM.end(); SRI != SRE; ++SRI) {
if (SRI->second == Reg)
continue; // self-cycles happen
- Changed |=
- normalizeWeight(SRI->second, UberSets, RegSets, NormalUnits, RegBank);
+ Changed |= normalizeWeight(SRI->second, UberSets, RegSets,
+ NormalRegs, NormalUnits, RegBank);
}
// Postorder register normalization.
@@ -1128,8 +1132,9 @@
Changed = false;
for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
CodeGenRegister::RegUnitList NormalUnits;
- Changed |=
- normalizeWeight(Registers[i], UberSets, RegSets, NormalUnits, *this);
+ std::set<unsigned> NormalRegs;
+ Changed |= normalizeWeight(Registers[i], UberSets, RegSets,
+ NormalRegs, NormalUnits, *this);
}
}
}
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