[llvm-commits] [llvm][PATCH][Review Requested][Version 2!] Don't check liveness of unallocatable registers

[Anton Korobeynikov]

Hi Preston,

This looks like a hiding the real problem to me.

> This includes registers like EFLAGS and ST0-ST7. We don't check for
> liveness issues in the verifier and scavenger because registers will
> never be allocated from these classes.
But still instructions can define / use EFLAGS and late codegen passes
can insert such instructions. And if the liveness of EFLAGS is wrong
then post-RA scheduler might interchange e.g. comparison and branch.
So, instead the producers of broken code needs to be changed.

Though Jakob might have other opinion here..

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University