[llvm-commits] [llvm] r156281 - in /llvm/trunk: include/llvm/IntrinsicsX86.td lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/sse4a.ll
Craig Topper
craig.topper at gmail.com
Sun May 6 22:36:19 PDT 2012
Author: ctopper
Date: Mon May 7 00:36:19 2012
New Revision: 156281
URL: http://llvm.org/viewvc/llvm-project?rev=156281&view=rev
Log:
Add SSE4A MOVNTSS/MOVNTSD instructions.
Added:
llvm/trunk/test/CodeGen/X86/sse4a.ll
Modified:
llvm/trunk/include/llvm/IntrinsicsX86.td
llvm/trunk/lib/Target/X86/X86InstrSSE.td
Modified: llvm/trunk/include/llvm/IntrinsicsX86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=156281&r1=156280&r2=156281&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon May 7 00:36:19 2012
@@ -1005,6 +1005,16 @@
}
//===----------------------------------------------------------------------===//
+// SSE4A
+
+let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_sse4a_movnt_ss : GCCBuiltin<"__builtin_ia32_movntss">,
+ Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty], []>;
+ def int_x86_sse4a_movnt_sd : GCCBuiltin<"__builtin_ia32_movntsd">,
+ Intrinsic<[], [llvm_ptr_ty, llvm_v2f64_ty], []>;
+}
+
+//===----------------------------------------------------------------------===//
// AVX
// Arithmetic ops
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=156281&r1=156280&r2=156281&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon May 7 00:36:19 2012
@@ -7271,6 +7271,20 @@
defm : pclmul_alias<"lqlq", 0x00>;
//===----------------------------------------------------------------------===//
+// SSE4A Instructions
+//===----------------------------------------------------------------------===//
+
+let Predicates = [HasSSE4A] in {
+def MOVNTSS : I<0x2B, MRMDestMem, (outs), (ins f32mem:$dst, VR128:$src),
+ "movntss\t{$src, $dst|$dst, $src}",
+ [(int_x86_sse4a_movnt_ss addr:$dst, VR128:$src)]>, XS;
+
+def MOVNTSD : I<0x2B, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
+ "movntsd\t{$src, $dst|$dst, $src}",
+ [(int_x86_sse4a_movnt_sd addr:$dst, VR128:$src)]>, XD;
+}
+
+//===----------------------------------------------------------------------===//
// AVX Instructions
//===----------------------------------------------------------------------===//
Added: llvm/trunk/test/CodeGen/X86/sse4a.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse4a.ll?rev=156281&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse4a.ll (added)
+++ llvm/trunk/test/CodeGen/X86/sse4a.ll Mon May 7 00:36:19 2012
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4a | FileCheck %s
+
+define void @test1(float* %p, <4 x float> %a) nounwind optsize ssp {
+; CHECK: movntss
+entry:
+ tail call void @llvm.x86.sse4a.movnt.ss(float* %p, <4 x float> %a) nounwind
+ ret void
+}
+
+declare void @llvm.x86.sse4a.movnt.ss(float*, <4 x float>)
+
+define void @test2(double* %p, <2 x double> %a) nounwind optsize ssp {
+; CHECK: movntsd
+entry:
+ tail call void @llvm.x86.sse4a.movnt.sd(double* %p, <2 x double> %a) nounwind
+ ret void
+}
+
+declare void @llvm.x86.sse4a.movnt.sd(double*, <2 x double>)
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