[llvm-commits] [RFC] Patch 1/3 for the native code compiler of Erlang

Yiannis Tsiouris gtsiour at softlab.ntua.gr
Thu May 3 03:27:18 PDT 2012


On 05/02/2012 11:58 PM, Jakob Stoklund Olesen wrote:
> On May 2, 2012, at 1:26 PM, Yiannis Tsiouris <gtsiour at softlab.ntua.gr> wrote:
>
>> Hi Jakob,
>>
>> On 05/02/2012 09:42 PM, Jakob Stoklund Olesen wrote:
>>> On May 2, 2012, at 10:36 AM, Yiannis Tsiouris <gtsiour at softlab.ntua.gr> wrote:
>>>
>>>> 0001:
>>>> | Implemented a new calling convention (cc 11) for HiPE similar to GHC's
>>>> | cc 10. In detail:
>>>> | * Inserted new symbol "cc 11" (CallingConv::HiPE).
>>>> | * Created cc and retcc for both 32 and 64 bit.
>>>> | * HiPE cc defines no calleE-save registers.
>>>> | * HiPE cc supports tail call optimization.
>>> Please add test cases.
>> Sorry for that! I must have missed the "--new-file" when using diff...
>> The attached commit includes the tests (based on ghc-cc/ghc-cc64.ll).
> Thanks.
>
>>>> 0002:
>>>> | Hack fix for GR32_TC registers.
>> The problem is that EAX, ECX and EDX are all registers that are involved
>> in argument passing (ARG0, ARG1, ARG2 actually). Thus, when a tailcall
>> needs more than 2 arguments there remains no register to be used for
>> holding the address of the dynamic tail call (as they are the only ones
>> in GR32_TC register class). We were not sure how we should attack this
>> problem, that's why we followed the approach of HiPE and added two more
>> registers  (not involved anywhere else in the HiPE CC).
>>
>> What do you think we should do for that? Shouldn't the registers
>> involved in this class be somehow co-related with the user-defined
>> calling conventions?
> Yes, and there is already a target hook for exactly that. Look at X86RegisterInfo::getPointerRegClass(). It should return GR32 for ptr_rc_tailcall(=2) when compiling a HiPE function.
>
> It looks like you will need to add an MI pointer argument to the getPointerRegClass target hook. Please do that in a separate patch.
>
> /jakob
Hi Jakob,

Let me see if I get this right:

I would need to use a MachineInstr pointer in order to get the Calling
convention; something like:

> const MachineBasicBlock * MBB = MI->getParent();
> const MachineFunction * MF = MBB->getParent();

and then do:

> MF->getCallingConv() == CallingConv::HiPE

Is this what you were thinking?

Furthermore, to do this properly I should change the interface of
getPointerRegClass target hook in all Targets and the usage of it by
changing TRI->getPointerRegClass() wherever needed, right?

I wil work on it and sent it as a separate patch and then use it to
implement the HiPE Calling Convention patch.

Thanks again,
Yiannis

-- 
Yiannis Tsiouris
Ph.D. student,
Software Engineering Laboratory,
National Technical University of Athens
WWW: http://www.softlab.ntua.gr/~gtsiour




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