[llvm-commits] [llvm] r156023 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/ARM/fmuls.ll

[Jim Grosbach]

Excellent! Thanks, Steve.

-Jim

On May 2, 2012, at 2:55 PM, Stephen Canon <scanon at apple.com> wrote:

> The only circumstances under which the transformation can change behavior are:
> 
> 	- input is sNaN
> 	- input is denormal AND the processor is in a flush-denormals configuration
> 
> both of these are outside the scope of C and IEEE-754 "shall" clauses.  Even if a user does care about these, if there is any subsequent FP operation on the result, the effect will be the same.
> 
> - Steve
> 
> On May 2, 2012, at 5:49 PM, Jim Grosbach <grosbach at apple.com> wrote:
> 
>> Apologies for the possibly naive question, but is this transformation valid if the input is a NaN or denormal? I suspect so for the latter, but am more unsure about the former.
>> 
>> -Jim
>> 
>> On May 2, 2012, at 2:32 PM, Owen Anderson <resistor at mac.com> wrote:
>> 
>>> Author: resistor
>>> Date: Wed May  2 16:32:35 2012
>>> New Revision: 156023
>>> 
>>> URL: http://llvm.org/viewvc/llvm-project?rev=156023&view=rev
>>> Log:
>>> Teach DAG combine that multiplication by 1.0 can always be constant folded.
>>> 
>>> Modified:
>>>  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>>>  llvm/trunk/test/CodeGen/ARM/fmuls.ll
>>> 
>>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=156023&r1=156022&r2=156023&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed May  2 16:32:35 2012
>>> @@ -5715,6 +5715,9 @@
>>> if (DAG.getTarget().Options.UnsafeFPMath &&
>>>     ISD::isBuildVectorAllZeros(N1.getNode()))
>>>   return N1;
>>> +  // fold (fmul A, 1.0) -> A
>>> +  if (N1CFP && N1CFP->isExactlyValue(1.0))
>>> +    return N0;
>>> // fold (fmul X, 2.0) -> (fadd X, X)
>>> if (N1CFP && N1CFP->isExactlyValue(+2.0))
>>>   return DAG.getNode(ISD::FADD, N->getDebugLoc(), VT, N0, N0);
>>> 
>>> Modified: llvm/trunk/test/CodeGen/ARM/fmuls.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fmuls.ll?rev=156023&r1=156022&r2=156023&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/ARM/fmuls.ll (original)
>>> +++ llvm/trunk/test/CodeGen/ARM/fmuls.ll Wed May  2 16:32:35 2012
>>> @@ -21,3 +21,12 @@
>>> ; CORTEXA8: 	vmul.f32	d0, d1, d0
>>> ; CORTEXA9: test:
>>> ; CORTEXA9: 	vmul.f32	s{{.}}, s{{.}}, s{{.}}
>>> +
>>> +; VFP2: test2
>>> +define float @test2(float %a) nounwind {
>>> +; CHECK-NOT: mul
>>> +; CHECK: mov pc, lr
>>> +  %ret = fmul float %a, 1.0
>>> +  ret float %ret
>>> +}
>>> +
>>> 
>>> 
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