[llvm-commits] [llvm][PATCH][Review Requested]

[Gurd, Preston]

For X86, don't check liveness of unallocatable registers.

This includes registers like EFLAGS and ST0-ST7. We don't check for
liveness issues in the verifier and scavenger because registers will
never be allocated from these classes.

While in SSA form, we do care about the liveness of unallocatable
unreserved registers. Liveness of EFLAGS and ST0 needs to be correct for
MachineDCE and MachineSinking.

Enable only for X86, since other targets may not want this behavior.

This patch is basically a re-implementation of commit r136541 (which was reverted by r136548) with the aim of changing the treatment of unallocatable registers for X86 without changing the current behavior for ARM.

--
Preston Gurd <preston.gurd at intel.com>
  Intel Waterloo

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