[llvm-commits] PATCH: Teach LLVM to form minimal multiply DAGs

[Hal Finkel]

On Thu, 26 Apr 2012 14:15:34 -0700
Chandler Carruth <chandlerc at gmail.com> wrote:

> On Thu, Apr 26, 2012 at 2:04 PM, Evan Cheng <evan.cheng at apple.com>
> wrote:
> 
> >
> > On Apr 25, 2012, at 10:54 PM, Chandler Carruth wrote:
> >
> > On Wed, Apr 25, 2012 at 10:45 PM, Evan Cheng <evan.cheng at apple.com>
> > wrote:
> >
> >>
> >>
> >> On Apr 25, 2012, at 9:20 PM, Chandler Carruth <chandlerc at gmail.com>
> >> wrote:
> >>
> >> On Tue, Apr 24, 2012 at 4:47 PM, Evan Cheng <evan.cheng at apple.com>
> >> wrote:
> >>
> >>> Interesting stuff. But it seems like we need some performance
> >>> data. Are they coming? :-)
> >>>
> >>
> >> Indeed!
> >>
> >> This has almost no impact on LNT. The only regressions look like
> >> noise to me (<3%, only two benchmarks)
> >>
> >> However, SPASS speeds up by 8%!!! =D
> >>
> >>
> >> Which platforms?
> >>
> >
> > x86-64
> >
> > Should i test it on some others? i don't have any arm hardware
> > handy, but can ask folks who do...
> >
> > I could check 32-bit i suppose, i don't usually track 32-bit x86
> > because it isn't relevant performance wise for anything I use...
> >
> >
> > I was hoping for ARM numbers as well.
> >
> 
> I don't have any reasonable ARM hardware to test on. I'm happy to
> help in any way I can, or if others have numbers?

I've not yet tried this myself, but I'm under the impression that the
gem5 simulator will do cycle-accurate ARM simulation (as well as
simulation for a number of other ISAs as well). The project seems to
have several contributors from ARM.

http://www.m5sim.org/
http://www.m5sim.org/ARM_Implementation

(FWIW, gem5 is MIT/BSD-licensed)

 -Hal

-- 
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory