[llvm-commits] [PATCH 00/11] Mips inline asm constraint patch request
Eric Christopher
echristo at apple.com
Thu Apr 26 14:45:11 PDT 2012
On Apr 12, 2012, at 1:23 PM, Jack Carter <jcarter at mips.com> wrote:
> The following series implements Mips specific inline asm constraints support.
>
> Constraints let the compiler know if specific values or registers are valid
> or not for the inline assembler being processed.
>
> This submittal has been reviewed internally here at Mips and tested with
> make check.
>
> ---
>
> Jack Carter (11):
> (patch) Mips Inline asm 16 bit register allowed for GPR constraints
> (patch) Mips inline asm: Allow 64 bit integer values in gpu registers if arch and abi are 64 bit
> (Patch) Mips specific inline asm: constraint 'I'
> (patch) Mips specific inline asm: constraint 'J'
> (patch) Mips specific inline asm: constraint 'K':
> (patch) Mips specific inline asm: constraint 'L':
> (patch) Mips specific inline asm: constraint 'N'
> (patch) Mips specific inline asm: constraint 'O':
> (patch) Mips specific inline asm: constraint 'P'
> (patch) Mips specific inline asm: constraint 'c'
> (patch) Mips specific inline asm: constraint 'l'
>
>
> lib/Target/Mips/MipsISelLowering.cpp | 134 +++++++++++++++++++++++-
> lib/Target/Mips/MipsISelLowering.h | 9 ++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-I-1.ll | 13 ++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll | 14 +++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll | 13 ++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll | 13 ++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-N.ll | 15 +++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-O.ll | 13 ++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-P.ll | 13 ++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-l.ll | 14 +++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-r-1.ll | 21 ++++
> test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll | 44 ++++++++
> test/CodeGen/Mips/inlineasm-cnstrnt-reg64.ll | 20 ++++
> test/CodeGen/Mips/inlineasm_constraint.ll | 55 ++++++++++
> 14 files changed, 387 insertions(+), 4 deletions(-)
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-I-1.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-N.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-O.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-P.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-l.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-r-1.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-reg64.ll
> create mode 100644 test/CodeGen/Mips/inlineasm_constraint.ll
So other than the negative patches the series is OK. I'll obviously need them rebased (sorry for the delay) and you should come up with a different way to test values that shouldn't be allowed.
Thanks!
-eric
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