[llvm-commits] [PATCH 06/11] (patch) Mips specific inline asm: constraint 'L':

[Eric Christopher]

On Apr 12, 2012, at 1:50 PM, Jack Carter <jcarter at mips.com> wrote:

> A signed 32 bit  constant in which the lower 16 bits are zero.
> 
> Example:
>  // Good: i_val fits the criteria
>  int i_input = 0x00000400; int i_result = 0; int i_tmp = 0;
> 
>  int i_val = 0x00100000;
>  __asm__ __volatile__(
>    "add %0,%1,%3\n\t" : "=r" (i_result) : "r" (i_input), "L" (i_val), "r" (i_tmp));
> 
>  // Bad: llc should complain
>  int i_val = 0x00100003;
>  __asm__ __volatile__(
>    "add %0,%1,%3\n\t" : "=r" (i_result)  : "r" (i_input), "L" (i_val), "r" (i_tmp));
> ---
> lib/Target/Mips/MipsISelLowering.cpp         |   11 +++++++++++
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll |   13 +++++++++++++
> test/CodeGen/Mips/inlineasm_constraint.ll    |    7 ++++++-
> 3 files changed, 30 insertions(+), 1 deletions(-)
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll
> 
> <Constraint_L.patch>_______________________________________________
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This is fine.

-eric