[llvm-commits] [llvm] r155475 - /llvm/trunk/test/CodeGen/X86/avx2-shuffle.ll
Nadav Rotem
nadav.rotem at intel.com
Tue Apr 24 12:45:28 PDT 2012
Author: nadav
Date: Tue Apr 24 14:45:28 2012
New Revision: 155475
URL: http://llvm.org/viewvc/llvm-project?rev=155475&view=rev
Log:
Add a testcase for 155440
Added:
llvm/trunk/test/CodeGen/X86/avx2-shuffle.ll
Added: llvm/trunk/test/CodeGen/X86/avx2-shuffle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx2-shuffle.ll?rev=155475&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx2-shuffle.ll (added)
+++ llvm/trunk/test/CodeGen/X86/avx2-shuffle.ll Tue Apr 24 14:45:28 2012
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
+
+; Make sure that we don't match this shuffle using the vpblendw instruction.
+; The mask for the vpblendw instruction needs to be identical for both halves
+; of the YMM.
+
+; CHECK: blendw1
+; CHECK-NOT: vpblendw
+; CHECK: ret
+define <16 x i16> @blendw1(<16 x i16> %a, <16 x i16> %b) nounwind alwaysinline {
+ %t = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 17, i32 18, i32 3, i32 20, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ ret <16 x i16> %t
+}
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