[llvm-commits] [llvm] r155459 - /llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp

[Andrew Trick]

Author: atrick
Date: Tue Apr 24 13:04:41 2012
New Revision: 155459

URL: http://llvm.org/viewvc/llvm-project?rev=155459&view=rev
Log:
misched: DAG builder must special case earlyclobber

Modified:
    llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp

Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=155459&r1=155458&r2=155459&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
+++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Tue Apr 24 13:04:41 2012
@@ -442,6 +442,15 @@
   SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot();
   LiveInterval *LI = &LIS->getInterval(Reg);
   VNInfo *VNI = LI->getVNInfoBefore(UseIdx);
+
+  // Special case: An early-clobber tied operand reads and writes the
+  // register one slot early. e.g. InlineAsm.
+  //
+  // FIXME: Same special case is in shrinkToUses. Hide under an API.
+  if (SlotIndex::isSameInstr(VNI->def, UseIdx)) {
+    UseIdx = VNI->def;
+    VNI = LI->getVNInfoBefore(UseIdx);
+  }
   // VNI will be valid because MachineOperand::readsReg() is checked by caller.
   MachineInstr *Def = LIS->getInstructionFromIndex(VNI->def);
   // Phis and other noninstructions (after coalescing) have a NULL Def.