[llvm-commits] [Patch] Loads used during ARM vector widening

[James Molloy]

Hi,

I should mention that I wrote the patterns this patch touches and it all
looks correct to me, but I'd appreciate it if another reviewer could look at
it!

Cheers,

James

-----Original Message-----
From: llvm-commits-bounces at cs.uiuc.edu
[mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Tim Northover
Sent: 24 April 2012 12:23
To: llvm-commits at cs.uiuc.edu
Subject: [llvm-commits] [Patch] Loads used during ARM vector widening

Hi,

This patch improves the performance of vector-extending loads on ARM.

Previously VLDR was used followed by VMOVLs. Unfortunately this mixes VFP
and 
NEON instructions which can be bad for performance on some cores (Cortex-A9
in 
particular).

This patch changes this pattern to use a single-lane NEON load instead:
   vld1 {d0[0]}, [wherever]

Could someone review and commit if OK?

Thanks.

Tim.