[llvm-commits] [llvm] r155440 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Nadav Rotem nadav.rotem at intel.com
Tue Apr 24 04:27:53 PDT 2012


Author: nadav
Date: Tue Apr 24 06:27:53 2012
New Revision: 155440

URL: http://llvm.org/viewvc/llvm-project?rev=155440&view=rev
Log:
AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8
immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.


Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=155440&r1=155439&r2=155440&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Apr 24 06:27:53 2012
@@ -5443,12 +5443,6 @@
     ISDNo = X86ISD::BLENDPD;
     OpTy = MVT::v4f64;
     break;
-  case MVT::v16i16:
-    if (!Subtarget->hasAVX2())
-      return SDValue();
-    ISDNo = X86ISD::BLENDPW;
-    OpTy = MVT::v16i16;
-    break;
   }
   assert(ISDNo && "Invalid Op Number");
 





More information about the llvm-commits mailing list