[llvm-commits] [llvm] r155235 - /llvm/trunk/include/llvm/Target/TargetRegisterInfo.h

[Andrew Trick]

On Apr 20, 2012, at 2:01 PM, Hal Finkel <hfinkel at anl.gov> wrote:

> Andy,
> 
> So is the plan to have register pressure sets with names different from
> the underlying register classes? Maybe this was explained somewhere
> else, but will these names have to be added manually, or will they get
> automatically-generated names based on the affected register classes
> (or something else)?

What we have today for register pressure sets is hopefully complete. Code in TableGen automatically generates the sets and their names from individual register definitions. It also looks at which registers are in the same allocatable classes, but otherwise ignores the register class definitions. So no structure is imposed on the register classes. See CodeGenRegBank::computeRegUnitSets.

On PPC you end up with:

getRegPressureSetName(unsigned Idx) const {
  static const char *PressureNameTable[] = {
    "CRBITRC",
    "F4RC",
    "VRRC",
    "CARRYRC",
    "CTRRC",
    "VRSAVERC",
    "CTRRC8",
    "GPRC+G8RC",
    0 };
  return PressureNameTable[Idx];
}

For straightforward architectures like PPC, the pressure sets parallel the classes. The only magic here is that GPRC and G8RC were combined into one set, which is important for pressure tracking.

You can look at X86 or ARM for much more fun cases. Not all allocatable register classes necessarily have a unique pressure set. Instead they map to a list of impacted pressure sets that are shared with other classes.

-Andy