[llvm-commits] [PATCH] Defer some shl transformations from InstCombine to DAGCombine

[Jakob Stoklund Olesen]

Hi,

Please review the attached patch which disables some InstCombine transformations for 'shl by constant' so it is treated more like 'mul by constant'.

The disabled transformations would replace shl instructions with bit masks, making it difficult for scalar evolution and isel to understand the IR.

This patch fixes two problems in one:

1. LSR doesn't understand addressing modes B+X, B+2*X because 2*X was transformed to a bit mask expression, no longer dependent on X. <rdar://problem/9280119>

2. Bitwise rotate idioms weren't getting recognized by isel because parts were transformed to bit mask expressions. <rdar://problem/11032268>

This patch does not cause any regressions in the nightly test suite, x86-64. In SingleSource, only two tests change assembly at all. Many MultiSource and SPEC tests are also completely unaffected.

/jakob

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