[llvm-commits] bug fix - SSE - shuffling 2 vectors size 2 into one vector size 2
Badouh, Asaf
asaf.badouh at intel.com
Sun Apr 15 05:33:02 PDT 2012
Bug description: merging two vector (2 x double) into one vector where the first component is A.1 and the second is B.1 gave a vector with (A.1, undef) in corei7, the correct output should be (A.1, B.1).
The lit test that related to this issue need to be update:
(llvm\test\CodeGen\X86\sse2.ll)
define void @test2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
%tmp3 = load <2 x double>* %A, align 16
%tmp7 = insertelement <2 x double> undef, double %B, i32 0
%tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 0, i32 2 >
store <2 x double> %tmp9, <2 x double>* %r, align 16
ret void
; CHECK: test2:
; CHECK: movsd 12(%esp), %xmm0
; CHECK-NEXT: movl 8(%esp), %eax
; CHECK-NEXT: movlpd (%eax), %xmm0
; CHECK-NEXT: movl 4(%esp), %eax
; CHECK-NEXT: movapd %xmm0, (%eax)
; CHECK-NEXT: ret
}
The correct code that need to be generate is:
; CHECK: test2:
; CHECK: movl 8(%esp), %eax
; CHECK-NEXT: movapd (%eax), %xmm0
; CHECK-NEXT: movhpd 12(%esp), %xmm0
; CHECK-NEXT: movl 4(%esp), %eax
; CHECK-NEXT: movapd %xmm0, (%eax)
; CHECK-NEXT: ret
Thanks,
Asaf
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