[llvm-commits] [llvm] r154414 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Owen Anderson
resistor at mac.com
Tue Apr 10 11:02:13 PDT 2012
Author: resistor
Date: Tue Apr 10 13:02:12 2012
New Revision: 154414
URL: http://llvm.org/viewvc/llvm-project?rev=154414&view=rev
Log:
Revert r154397, which was causing make check failures on the buildbots.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=154414&r1=154413&r2=154414&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Apr 10 13:02:12 2012
@@ -4354,17 +4354,12 @@
// Only do this before legalize for now.
if (VT.isVector() && !LegalOperations) {
EVT N0VT = N0.getOperand(0).getValueType();
- // On some architectures (such as SSE/NEON/etc)the SETCC result type is
- // of the same size as the compared operands. Only optimize sext(setcc())
- // if this is the case.
- EVT SVT = TLI.getSetCCResultType(N0VT);
-
// We know that the # elements of the results is the same as the
// # elements of the compare (and the # elements of the compare result
// for that matter). Check to see that they are the same size. If so,
// we know that the element size of the sext'd result matches the
// element size of the compare operands.
- if (VT.getSizeInBits() == SVT.getSizeInBits())
+ if (VT.getSizeInBits() == N0VT.getSizeInBits())
return DAG.getSetCC(N->getDebugLoc(), VT, N0.getOperand(0),
N0.getOperand(1),
cast<CondCodeSDNode>(N0.getOperand(2))->get());
@@ -4378,13 +4373,11 @@
EVT MatchingVectorType =
EVT::getVectorVT(*DAG.getContext(), MatchingElementType,
N0VT.getVectorNumElements());
-
- if (SVT == MatchingVectorType) {
- SDValue VsetCC = DAG.getSetCC(N->getDebugLoc(), MatchingVectorType,
- N0.getOperand(0), N0.getOperand(1),
- cast<CondCodeSDNode>(N0.getOperand(2))->get());
- return DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT);
- }
+ SDValue VsetCC =
+ DAG.getSetCC(N->getDebugLoc(), MatchingVectorType, N0.getOperand(0),
+ N0.getOperand(1),
+ cast<CondCodeSDNode>(N0.getOperand(2))->get());
+ return DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT);
}
}
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