[llvm-commits] [PATCH] llvm-stress fixes

Hal Finkel hfinkel at anl.gov
Mon Apr 9 14:23:00 PDT 2012


On Mon, 9 Apr 2012 14:10:46 -0700
Eli Friedman <eli.friedman at gmail.com> wrote:

> On Fri, Apr 6, 2012 at 8:31 AM, nobled <nobled at dreamwidth.org> wrote:
> > Attached are some fixes for assertion failures running llvm-stress.
> > However, there's a third problem that's uncovered once these get
> > applied.
> >
> > Now, with certain combinations of options, I get this assertion:
> > bin/llvm-stress -seed=1 -size=500 -generate-fp128
> > -generate-half-float -generate-ppc-fp128 -generate-x86-fp80
> > -generate-x86-mmx -o /dev/null
> > llvm-stress: /llvm/lib/VMCore/Instructions.cpp:2719:
> > llvm::FPExtInst::FPExtInst(llvm::Value*, llvm::Type*, const
> > llvm::Twine&, llvm::Instruction*): Assertion
> > `castIsValid(getOpcode(), S, Ty) && "Illegal FPExt"' failed.
> >
> > ...because it's trying to use an fpext to cast from a ppc_fp128 type
> > to an IEEE-standard fp128 type.
> >
> > Which raises the question, just how *are* you supposed to cast
> > between those types?  fptrunc asserts for the same reason; they're
> > both 128 bits. But they don't look like they can just be bitcast to
> > each other either.
> 
> There isn't any straightforward way in LLVM IR to convert between the
> two types, although you can trunc to double and re-extend.  I don't
> even know how you would actually implement the conversion, though, so
> it's probably okay to just avoid generating it.

I agree with Eli, just avoid generating it.

Regarding conversion, given that ppc128 is actually the sum of two IEEE
(64-bit) doubles, you would need to convert both doubles to fp128 and
then add the two resulting fp128 values.

 -Hal

> 
> For the random-float patch, it would be nice to make it generate
> infinity and NaN's more frequently; otherwise, the patches seem okay.
> 
> -Eli
> 
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-- 
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory




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