[llvm-commits] [llvm] r153848 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/Target/X86/X86ISelLowering.cpp test/CodeGen/ARM/reg_sequence.ll test/CodeGen/CellSPU/rotate_ops.ll test/CodeGen/X86/2011-10-27-tstore.ll test/CodeGen/X86

[Chris Lattner]

On Apr 7, 2012, at 2:43 PM, Rotem, Nadav wrote:

> Hi Eli and Chris, 
> 
> I removed the part of 153848 that generated new shuffles and added a more restrictive optimization that only removes shuffles.

Thanks!  The real problem here is that the optimizer has no way to reason about the cost of a shuffle.  The perfect shuffle tables (used by ARM and PPC) have accurate cost info for the shuffles it supports, but we don't expose it, and don't expose any other cost information.  This is something that we'll have to tackle when the target vectorization API comes up.

Once it exists, instcombine (and dag combine) can smoosh two shuffles together and ask if it is at least as cheap as the two original shuffles.

-Chris