[llvm-commits] [llvm] r154100 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/Disassembler/ARM/invalid-LDRT-arm.txt test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt

[Silviu Baranga]

Author: sbaranga
Date: Thu Apr  5 11:13:15 2012
New Revision: 154100

URL: http://llvm.org/viewvc/llvm-project?rev=154100&view=rev
Log:
Added support for handling unpredictable arithmetic instructions on ARM.

Added:
    llvm/trunk/test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt
Removed:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=154100&r1=154099&r2=154100&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Apr  5 11:13:15 2012
@@ -3244,6 +3244,8 @@
   let Inst{19-16} = Rn;
   let Inst{15-12} = Rd;
   let Inst{3-0}   = Rm;
+  
+  let Unpredictable{11-8} = 0b1111;
 }
 
 // Saturating add/subtract

Removed: llvm/trunk/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt?rev=154099&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt (removed)
@@ -1,12 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
-
-# Opcode=0 Name=PHI Format=(42)
-#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
-# -------------------------------------------------------------------------------------------------
-# | 1: 1: 1: 0| 0: 1: 1: 0| 0: 0: 1: 1| 0: 1: 1: 1| 0: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0|
-# -------------------------------------------------------------------------------------------------
-#
-# The bytes have Inst{4} = 1, so it's not an LDRT Encoding A2 instruction.
-0x10 0x51 0x37 0xe6
-
-

Added: llvm/trunk/test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt?rev=154100&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt Thu Apr  5 11:13:15 2012
@@ -0,0 +1,7 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& FileCheck %s
+
+# CHECK: warning: potentially undefined
+# CHECK: shadd16	r5, r7, r0
+0x10 0x51 0x37 0xe6
+
+