[llvm-commits] [llvm] r153844 - /llvm/trunk/lib/Target/PowerPC/PPCSchedule440.td

[Hal Finkel]

Author: hfinkel
Date: Sun Apr  1 14:23:04 2012
New Revision: 153844

URL: http://llvm.org/viewvc/llvm-project?rev=153844&view=rev
Log:
Add ppc440 itin. entries for LdStSTD*

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCSchedule440.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCSchedule440.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSchedule440.td?rev=153844&r1=153843&r2=153844&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCSchedule440.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSchedule440.td Sun Apr  1 14:23:04 2012
@@ -373,6 +373,26 @@
                                InstrStage<1, [LWB]>],
                               [8, 5],
                               [NoBypass, GPR_Bypass]>,
+  InstrItinData<LdStSTD     , [InstrStage<1, [IFTH1, IFTH2]>,
+                               InstrStage<1, [PDCD1, PDCD2]>,
+                               InstrStage<1, [DISS1, DISS2]>,
+                               InstrStage<1, [LRACC]>,
+                               InstrStage<1, [AGEN]>,
+                               InstrStage<1, [CRD]>,
+                               InstrStage<2, [LWB]>],
+                              [8, 5],
+                              [NoBypass, GPR_Bypass]>,
+  InstrItinData<LdStSTDCX   , [InstrStage<1, [IFTH1, IFTH2]>,
+                               InstrStage<1, [PDCD1, PDCD2]>,
+                               InstrStage<1, [DISS1]>,
+                               InstrStage<1, [IRACC], 0>,
+                               InstrStage<4, [LWARX_Hold], 0>,
+                               InstrStage<1, [LRACC]>,
+                               InstrStage<1, [AGEN]>,
+                               InstrStage<1, [CRD]>,
+                               InstrStage<1, [LWB]>],
+                              [8, 5],
+                              [NoBypass, GPR_Bypass]>,
   InstrItinData<LdStSTWCX   , [InstrStage<1, [IFTH1, IFTH2]>,
                                InstrStage<1, [PDCD1, PDCD2]>,
                                InstrStage<1, [DISS1]>,