[llvm-commits] [PATCH] Make X86 REP MOV / REP STO instructions use the right operands in 32/64 bit mode.

[Lang Hames]

Hi All,

Can someone more familiar with TableGen take a quick look at this patch?
It's intended to ensure that REP_MOV* instructions use the RSI/RDI/RCX
registers in 64bit mode, and ESI/EDI/ECX registers in 32bit mode. Similar
use fixes apply for the REP_STO* instructions.

This prevents isel from inserting some strange copies to deal with the
mismatched operand sizes in 64bit mode. E.g.

Old code:

%vreg1<def> = MOV64ri64i32 32; GR64:%vreg1
...
%RCX<def,dead> = COPY %vreg1<kill>, %ECX<imp-def>; GR64:%vreg1
...
REP_MOVSD %ECX<imp-def,dead>, %EDI<imp-def,dead>, %ESI<imp-def,dead>,
%ECX<imp-use,kill>, %EDI<imp-use,kill,undef>, %ESI<imp-use,kill>

With this patch applied the code comes out as:

%vreg1<def> = MOV64ri64i32 32; GR64:%vreg1
...
%RCX<def> = COPY %vreg1<kill>; GR64:%vreg1
...
REP_MOVSD_64 %RCX<imp-def,dead>, %RDI<imp-def,dead>, %RSI<imp-def,dead>,
%RCX<imp-use,kill>, %RDI<imp-use,kill,undef>, %RSI<imp-use,kill>


Cheers,
Lang.
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