[llvm-commits] [llvm] r152816 - /llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp

[Craig Topper]

You may want to fix AsmMatcher that also uses uint16_t for mnemonics.

  OS << *"  struct OperandMatchEntry {\n"*;
  OS << *"    static const char *MnemonicTable;\n"*;
  OS << *"    unsigned OperandMask;\n"*;
  OS << *"    uint16_t Mnemonic;\n"*;


  OS << *"namespace {\n"*;
  OS << *"  struct MatchEntry {\n"*;
  OS << *"    static const char *MnemonicTable;\n"*;
  OS << *"    uint16_t Opcode;\n"*;
  OS << *"    uint16_t Mnemonic;\n"*;




On Thu, Mar 15, 2012 at 11:05 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote:

> Author: stoklund
> Date: Thu Mar 15 13:05:54 2012
> New Revision: 152816
>
> URL: http://llvm.org/viewvc/llvm-project?rev=152816&view=rev
> Log:
> Revert r152105: "Use uint16_t to store indices into string table"
>
> This patch limited the concatenated register names to 64K which meant
> that the total number of registers was many times less than 64K.
>
> If any compilers actually enforce the 64K limit on string literals, and
> it turns out to be a problem, we should fix that problem by not using
> long string literals.
>
> Modified:
>    llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
>
> Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=152816&r1=152815&r2=152816&view=diff
>
> ==============================================================================
> --- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Thu Mar 15 13:05:54 2012
> @@ -464,7 +464,7 @@
>  emitRegisterNameString(raw_ostream &O, StringRef AltName,
>   const std::vector<CodeGenRegister*> &Registers) {
>   StringToOffsetTable StringTable;
> -  O << "  static const uint16_t RegAsmOffset" << AltName << "[] = {\n
>  ";
> +  O << "  static const unsigned RegAsmOffset" << AltName << "[] = {\n
>  ";
>   for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
>     const CodeGenRegister &Reg = *Registers[i];
>
> @@ -510,7 +510,7 @@
>     << "  };\n"
>     << "\n";
>
> -  O << "  const char *const AsmStrs" << AltName << " =\n";
> +  O << "  const char *AsmStrs" << AltName << " =\n";
>   StringTable.EmitString(O);
>   O << ";\n";
>  }
> @@ -544,7 +544,7 @@
>     emitRegisterNameString(O, "", Registers);
>
>   if (hasAltNames) {
> -    O << "  const uint16_t *RegAsmOffset;\n"
> +    O << "  const unsigned *RegAsmOffset;\n"
>       << "  const char *AsmStrs;\n"
>       << "  switch(AltIdx) {\n"
>       << "  default: llvm_unreachable(\"Invalid register alt name
> index!\");\n";
> @@ -586,7 +586,7 @@
>   << "  assert(Opcode < " << NumberedInstructions.size()
>   << " && \"Invalid instruction number!\");\n"
>   << "\n"
> -  << "  static const uint16_t InstAsmOffset[] = {";
> +  << "  static const unsigned InstAsmOffset[] = {";
>   for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
>     const CodeGenInstruction &Inst = *NumberedInstructions[i];
>
> @@ -602,7 +602,7 @@
>   << "  };\n"
>   << "\n";
>
> -  O << "  const char *const Strs =\n";
> +  O << "  const char *Strs =\n";
>   StringTable.EmitString(O);
>   O << ";\n";
>
>
>
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>



-- 
~Craig
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