[llvm-commits] [llvm] r152487 - in /llvm/trunk: lib/Target/X86/X86InstrSystem.td test/MC/Disassembler/X86/intel-syntax.txt

[Bill Wendling]

Author: void
Date: Sat Mar 10 01:37:27 2012
New Revision: 152487

URL: http://llvm.org/viewvc/llvm-project?rev=152487&view=rev
Log:
Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax.
Patch by Kay Tiong Khoo!

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSystem.td
    llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt

Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=152487&r1=152486&r2=152487&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Sat Mar 10 01:37:27 2012
@@ -45,17 +45,17 @@
 
 
 def SYSCALL  : I<0x05, RawFrm, (outs), (ins), "syscall", []>, TB;
-def SYSRETL  : I<0x07, RawFrm, (outs), (ins), "sysretl", []>, TB;
-def SYSRETQ  :RI<0x07, RawFrm, (outs), (ins), "sysretq", []>, TB,
+def SYSRET   : I<0x07, RawFrm, (outs), (ins), "sysret{l}", []>, TB;
+def SYSRET64 :RI<0x07, RawFrm, (outs), (ins), "sysret{q}", []>, TB,
                Requires<[In64BitMode]>;
 
 def SYSENTER : I<0x34, RawFrm, (outs), (ins), "sysenter", []>, TB;
                  
-def SYSEXIT   : I<0x35, RawFrm, (outs), (ins), "sysexitl", []>, TB;
-def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexitq", []>, TB,
+def SYSEXIT   : I<0x35, RawFrm, (outs), (ins), "sysexit{l}", []>, TB;
+def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexit{q}", []>, TB,
                 Requires<[In64BitMode]>;
 
-def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iretw", []>, OpSize;
+def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iret{w}", []>, OpSize;
 def IRET32 : I<0xcf, RawFrm, (outs), (ins), "iret{l|d}", []>;
 def IRET64 : RI<0xcf, RawFrm, (outs), (ins), "iretq", []>,
              Requires<[In64BitMode]>;

Modified: llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt?rev=152487&r1=152486&r2=152487&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt Sat Mar 10 01:37:27 2012
@@ -77,3 +77,25 @@
 
 # CHECK: test RAX, 0
 0x48 0xa9 0x00 0x00 0x00 0x00
+
+# CHECK: sysret
+0x48 0x0f 0x07
+
+# CHECK: sysret
+0x0f 0x07
+
+# CHECK: sysexit
+0x48 0x0f 0x35
+
+# CHECK: sysexit
+0x0f 0x35
+
+# CHECK: iret
+0x66 0xcf
+
+# CHECK: iretd
+0xcf
+
+# CHECK: iretq
+0x48 0xcf
+