[llvm-commits] [llvm] r151722 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp test/CodeGen/X86/legalize-shift-64.ll

[Benjamin Kramer]

Author: d0k
Date: Wed Feb 29 07:27:00 2012
New Revision: 151722

URL: http://llvm.org/viewvc/llvm-project?rev=151722&view=rev
Log:
LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" optimization, making the lives of later passes easier.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/test/CodeGen/X86/legalize-shift-64.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=151722&r1=151721&r2=151722&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Feb 29 07:27:00 2012
@@ -1419,10 +1419,10 @@
       std::swap(InL, InH);
 
     // Use a little trick to get the bits that move from Lo to Hi. First
-    // calculate the shift with amount-1.
-    SDValue Sh1 = DAG.getNode(Op2, dl, NVT, InL, Amt2);
-    // Then shift one bit further to get the right result.
-    SDValue Sh2 = DAG.getNode(Op2, dl, NVT, Sh1, DAG.getConstant(1, ShTy));
+    // shift by one bit.
+    SDValue Sh1 = DAG.getNode(Op2, dl, NVT, InL, DAG.getConstant(1, ShTy));
+    // Then compute the remaining shift with amount-1.
+    SDValue Sh2 = DAG.getNode(Op2, dl, NVT, Sh1, Amt2);
 
     Lo = DAG.getNode(N->getOpcode(), dl, NVT, InL, Amt);
     Hi = DAG.getNode(ISD::OR, dl, NVT, DAG.getNode(Op1, dl, NVT, InH, Amt),Sh2);

Modified: llvm/trunk/test/CodeGen/X86/legalize-shift-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/legalize-shift-64.ll?rev=151722&r1=151721&r2=151722&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/legalize-shift-64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/legalize-shift-64.ll Wed Feb 29 07:27:00 2012
@@ -8,9 +8,9 @@
   ret i64 %shl
 ; CHECK: test1:
 ; CHECK: shll	%cl, %eax
+; CHECK: shrl	%edx
 ; CHECK: xorb	$31
 ; CHECK: shrl	%cl, %edx
-; CHECK: shrl	%edx
 }
 
 define i64 @test2(i64 %xx, i32 %test) nounwind {
@@ -20,9 +20,9 @@
   ret i64 %shl
 ; CHECK: test2:
 ; CHECK: shll	%cl, %esi
+; CHECK: shrl	%edx
 ; CHECK: xorb	$31
 ; CHECK: shrl	%cl, %edx
-; CHECK: shrl	%edx
 ; CHECK: orl	%esi, %edx
 ; CHECK: shll	%cl, %eax
 }
@@ -34,9 +34,9 @@
   ret i64 %shr
 ; CHECK: test3:
 ; CHECK: shrl	%cl, %esi
+; CHECK: leal	(%edx,%edx), %eax
 ; CHECK: xorb	$31, %cl
 ; CHECK: shll	%cl, %eax
-; CHECK: addl	%eax, %eax
 ; CHECK: orl	%esi, %eax
 ; CHECK: shrl	%cl, %edx
 }
@@ -48,9 +48,9 @@
   ret i64 %shr
 ; CHECK: test4:
 ; CHECK: shrl	%cl, %esi
+; CHECK: leal	(%edx,%edx), %eax
 ; CHECK: xorb	$31, %cl
 ; CHECK: shll	%cl, %eax
-; CHECK: addl	%eax, %eax
 ; CHECK: orl	%esi, %eax
 ; CHECK: sarl	%cl, %edx
 }