[llvm-commits] [llvm] r151274 - /llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp

[Jakob Stoklund Olesen]

On Feb 23, 2012, at 11:29 AM, Benjamin Kramer <benny.kra at googlemail.com> wrote:

> Author: d0k
> Date: Thu Feb 23 13:29:25 2012
> New Revision: 151274
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=151274&view=rev
> Log:
> BitVectorize loop.

Thanks, Ben.

This code doesn't get exercised yet, but I am just about to commit a patch that enables regmasks for ARM. Then the post-ra scheduler will start seeing regmasks.

/jakob


> Modified:
>    llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp?rev=151274&r1=151273&r2=151274&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp Thu Feb 23 13:29:25 2012
> @@ -460,9 +460,7 @@
>     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
>       MachineOperand &MO = MI->getOperand(i);
>       if (MO.isRegMask())
> -        for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i)
> -          if (MO.clobbersPhysReg(i))
> -            LiveRegs.reset(i);
> +        LiveRegs.clearBitsNotInMask(MO.getRegMask());
>       if (!MO.isReg()) continue;
>       unsigned Reg = MO.getReg();
>       if (Reg == 0) continue;
> 
> 
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