[llvm-commits] [llvm] r150568 - /llvm/trunk/lib/CodeGen/Passes.cpp

[Duncan Sands]

Hi Andrew,

> Revert r150565 again. Appears to be a stage2 failure with dragonegg.

thanks for reverting this.  Indeed both x86-32 dragonegg builders failed
in the same way (the built compiler dies with a segmentation fault).  The
64 bit builders seem happy.  I will try to get you a test case.

Ciao, Duncan.

>
> I'll put MachineLICM back before PEI. All my arm/x86 benchmarks look good, but buildbots don't like it.
>
> Modified:
>      llvm/trunk/lib/CodeGen/Passes.cpp
>
> Modified: llvm/trunk/lib/CodeGen/Passes.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Passes.cpp?rev=150568&r1=150567&r2=150568&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/Passes.cpp (original)
> +++ llvm/trunk/lib/CodeGen/Passes.cpp Wed Feb 15 01:57:03 2012
> @@ -582,8 +582,14 @@
>     //
>     // FIXME: Re-enable coloring with register when it's capable of adding
>     // kill markers.
> -  if (addPass(StackSlotColoringID) !=&NoPassID)
> -    printAndVerify("After StackSlotColoring");
> +  addPass(StackSlotColoringID);
> +
> +  // Run post-ra machine LICM to hoist reloads / remats.
> +  //
> +  // FIXME: can this move into MachineLateOptimization?
> +  addPass(PostRAMachineLICMID);
> +
> +  printAndVerify("After StackSlotColoring and postra Machine LICM");
>   }
>
>   //===---------------------------------------------------------------------===//
> @@ -592,10 +598,6 @@
>
>   /// Add passes that optimize machine instructions after register allocation.
>   void TargetPassConfig::addMachineLateOptimization() {
> -  // Run post-ra machine LICM to hoist reloads / remats.
> -  if (addPass(PostRAMachineLICMID) !=&NoPassID)
> -    printAndVerify("After postra Machine LICM");
> -
>     // Branch folding must be run after regalloc and prolog/epilog insertion.
>     if (addPass(BranchFolderPassID) !=&NoPassID)
>       printNoVerify("After BranchFolding");
>
>
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