[llvm-commits] [llvm] r150321 - in /llvm/trunk/lib/Target/X86: X86InstrFragmentsSIMD.td X86InstrSSE.td
Benjamin Kramer
benny.kra at googlemail.com
Sun Feb 12 10:52:56 PST 2012
On 12.02.2012, at 02:07, Craig Topper wrote:
> Author: ctopper
> Date: Sat Feb 11 19:07:34 2012
> New Revision: 150321
>
> URL: http://llvm.org/viewvc/llvm-project?rev=150321&view=rev
> Log:
> Remove more vector_shuffle patterns.
Hi Craig,
It looks like this change made some tests fail on older CPUs.
LLVM :: CodeGen/X86/2010-01-15-SelectionDAGCycle.ll
LLVM :: CodeGen/X86/2011-02-12-shuffle.ll
LLVM :: CodeGen/X86/mem-promote-integers.ll
LLVM :: CodeGen/X86/shl-i64.ll
LLVM :: CodeGen/X86/vec_zext.ll
You can reproduce the crash by passing e.g. -mcpu=core2 to llc and it will crash.
LLVM ERROR: Cannot select: 0x1d8bb80: v4i32 = vector_shuffle 0x1d90da0, 0x1d92760<1,u,u,u> [ID=37]
- Ben
> Modified:
> llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
> llvm/trunk/lib/Target/X86/X86InstrSSE.td
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=150321&r1=150320&r2=150321&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Sat Feb 11 19:07:34 2012
> @@ -412,11 +412,6 @@
> return X86::isPSHUFDMask(cast<ShuffleVectorSDNode>(N));
> }], SHUFFLE_get_shuf_imm>;
>
> -def shufp : PatFrag<(ops node:$lhs, node:$rhs),
> - (vector_shuffle node:$lhs, node:$rhs), [{
> - return X86::isSHUFPMask(cast<ShuffleVectorSDNode>(N), Subtarget->hasAVX());
> -}], SHUFFLE_get_shuf_imm>;
> -
> def pshufhw : PatFrag<(ops node:$lhs, node:$rhs),
> (vector_shuffle node:$lhs, node:$rhs), [{
> return X86::isPSHUFHWMask(cast<ShuffleVectorSDNode>(N));
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=150321&r1=150320&r2=150321&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Sat Feb 11 19:07:34 2012
> @@ -2226,15 +2226,13 @@
> Domain d, bit IsConvertibleToThreeAddress = 0> {
> def rmi : PIi8<0xC6, MRMSrcMem, (outs RC:$dst),
> (ins RC:$src1, x86memop:$src2, i8imm:$src3), asm,
> - [(set RC:$dst, (vt (shufp:$src3
> - RC:$src1, (mem_frag addr:$src2))))],
> - IIC_DEFAULT, d>;
> + [(set RC:$dst, (vt (X86Shufp RC:$src1, (mem_frag addr:$src2),
> + (i8 imm:$src3))))], IIC_DEFAULT, d>;
> let isConvertibleToThreeAddress = IsConvertibleToThreeAddress in
> def rri : PIi8<0xC6, MRMSrcReg, (outs RC:$dst),
> (ins RC:$src1, RC:$src2, i8imm:$src3), asm,
> - [(set RC:$dst,
> - (vt (shufp:$src3 RC:$src1, RC:$src2)))],
> - IIC_DEFAULT, d>;
> + [(set RC:$dst, (vt (X86Shufp RC:$src1, RC:$src2,
> + (i8 imm:$src3))))], IIC_DEFAULT, d>;
> }
>
> defm VSHUFPS : sse12_shuffle<VR128, f128mem, v4f32,
> @@ -2262,11 +2260,6 @@
> }
>
> let Predicates = [HasAVX] in {
> - def : Pat<(v4f32 (X86Shufp VR128:$src1,
> - (memopv4f32 addr:$src2), (i8 imm:$imm))),
> - (VSHUFPSrmi VR128:$src1, addr:$src2, imm:$imm)>;
> - def : Pat<(v4f32 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
> - (VSHUFPSrri VR128:$src1, VR128:$src2, imm:$imm)>;
> def : Pat<(v4i32 (X86Shufp VR128:$src1,
> (bc_v4i32 (memopv2i64 addr:$src2)), (i8 imm:$imm))),
> (VSHUFPSrmi VR128:$src1, addr:$src2, imm:$imm)>;
> @@ -2281,14 +2274,6 @@
> def : Pat<(v4f32 (pshufd:$src3 VR128:$src1, (undef))),
> (VSHUFPSrri VR128:$src1, VR128:$src1,
> (SHUFFLE_get_shuf_imm VR128:$src3))>;
> - // Special binary v4i32 shuffle cases with SHUFPS.
> - def : Pat<(v4i32 (shufp:$src3 VR128:$src1, (v4i32 VR128:$src2))),
> - (VSHUFPSrri VR128:$src1, VR128:$src2,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
> - def : Pat<(v4i32 (shufp:$src3 VR128:$src1,
> - (bc_v4i32 (memopv2i64 addr:$src2)))),
> - (VSHUFPSrmi VR128:$src1, addr:$src2,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
> // Special unary SHUFPDrri cases.
> def : Pat<(v2i64 (pshufd:$src3 VR128:$src1, (undef))),
> (VSHUFPDrri VR128:$src1, VR128:$src1,
> @@ -2296,21 +2281,12 @@
> def : Pat<(v2f64 (pshufd:$src3 VR128:$src1, (undef))),
> (VSHUFPDrri VR128:$src1, VR128:$src1,
> (SHUFFLE_get_shuf_imm VR128:$src3))>;
> - // Special binary v2i64 shuffle cases using SHUFPDrri.
> - def : Pat<(v2i64 (shufp:$src3 VR128:$src1, VR128:$src2)),
> - (VSHUFPDrri VR128:$src1, VR128:$src2,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
>
> def : Pat<(v2i64 (X86Shufp VR128:$src1,
> (memopv2i64 addr:$src2), (i8 imm:$imm))),
> (VSHUFPDrmi VR128:$src1, addr:$src2, imm:$imm)>;
> - def : Pat<(v2f64 (X86Shufp VR128:$src1,
> - (memopv2f64 addr:$src2), (i8 imm:$imm))),
> - (VSHUFPDrmi VR128:$src1, addr:$src2, imm:$imm)>;
> def : Pat<(v2i64 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
> (VSHUFPDrri VR128:$src1, VR128:$src2, imm:$imm)>;
> - def : Pat<(v2f64 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
> - (VSHUFPDrri VR128:$src1, VR128:$src2, imm:$imm)>;
>
> // 256-bit patterns
> def : Pat<(v8i32 (X86Shufp VR256:$src1, VR256:$src2, (i8 imm:$imm))),
> @@ -2319,31 +2295,14 @@
> (bc_v8i32 (memopv4i64 addr:$src2)), (i8 imm:$imm))),
> (VSHUFPSYrmi VR256:$src1, addr:$src2, imm:$imm)>;
>
> - def : Pat<(v8f32 (X86Shufp VR256:$src1, VR256:$src2, (i8 imm:$imm))),
> - (VSHUFPSYrri VR256:$src1, VR256:$src2, imm:$imm)>;
> - def : Pat<(v8f32 (X86Shufp VR256:$src1,
> - (memopv8f32 addr:$src2), (i8 imm:$imm))),
> - (VSHUFPSYrmi VR256:$src1, addr:$src2, imm:$imm)>;
> -
> def : Pat<(v4i64 (X86Shufp VR256:$src1, VR256:$src2, (i8 imm:$imm))),
> (VSHUFPDYrri VR256:$src1, VR256:$src2, imm:$imm)>;
> def : Pat<(v4i64 (X86Shufp VR256:$src1,
> (memopv4i64 addr:$src2), (i8 imm:$imm))),
> (VSHUFPDYrmi VR256:$src1, addr:$src2, imm:$imm)>;
> -
> - def : Pat<(v4f64 (X86Shufp VR256:$src1, VR256:$src2, (i8 imm:$imm))),
> - (VSHUFPDYrri VR256:$src1, VR256:$src2, imm:$imm)>;
> - def : Pat<(v4f64 (X86Shufp VR256:$src1,
> - (memopv4f64 addr:$src2), (i8 imm:$imm))),
> - (VSHUFPDYrmi VR256:$src1, addr:$src2, imm:$imm)>;
> }
>
> let Predicates = [HasSSE1] in {
> - def : Pat<(v4f32 (X86Shufp VR128:$src1,
> - (memopv4f32 addr:$src2), (i8 imm:$imm))),
> - (SHUFPSrmi VR128:$src1, addr:$src2, imm:$imm)>;
> - def : Pat<(v4f32 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
> - (SHUFPSrri VR128:$src1, VR128:$src2, imm:$imm)>;
> def : Pat<(v4i32 (X86Shufp VR128:$src1,
> (bc_v4i32 (memopv2i64 addr:$src2)), (i8 imm:$imm))),
> (SHUFPSrmi VR128:$src1, addr:$src2, imm:$imm)>;
> @@ -2354,43 +2313,15 @@
> def : Pat<(v4f32 (movlp:$src3 VR128:$src1, (v4f32 VR128:$src2))),
> (SHUFPSrri VR128:$src2, VR128:$src1,
> (SHUFFLE_get_shuf_imm VR128:$src3))>;
> - // Special unary SHUFPSrri case.
> - def : Pat<(v4f32 (pshufd:$src3 VR128:$src1, (undef))),
> - (SHUFPSrri VR128:$src1, VR128:$src1,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
> }
>
> let Predicates = [HasSSE2] in {
> - // Special binary v4i32 shuffle cases with SHUFPS.
> - def : Pat<(v4i32 (shufp:$src3 VR128:$src1, (v4i32 VR128:$src2))),
> - (SHUFPSrri VR128:$src1, VR128:$src2,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
> - def : Pat<(v4i32 (shufp:$src3 VR128:$src1,
> - (bc_v4i32 (memopv2i64 addr:$src2)))),
> - (SHUFPSrmi VR128:$src1, addr:$src2,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
> - // Special unary SHUFPDrri cases.
> - def : Pat<(v2i64 (pshufd:$src3 VR128:$src1, (undef))),
> - (SHUFPDrri VR128:$src1, VR128:$src1,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
> - def : Pat<(v2f64 (pshufd:$src3 VR128:$src1, (undef))),
> - (SHUFPDrri VR128:$src1, VR128:$src1,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
> - // Special binary v2i64 shuffle cases using SHUFPDrri.
> - def : Pat<(v2i64 (shufp:$src3 VR128:$src1, VR128:$src2)),
> - (SHUFPDrri VR128:$src1, VR128:$src2,
> - (SHUFFLE_get_shuf_imm VR128:$src3))>;
> // Generic SHUFPD patterns
> def : Pat<(v2i64 (X86Shufp VR128:$src1,
> (memopv2i64 addr:$src2), (i8 imm:$imm))),
> (SHUFPDrmi VR128:$src1, addr:$src2, imm:$imm)>;
> - def : Pat<(v2f64 (X86Shufp VR128:$src1,
> - (memopv2f64 addr:$src2), (i8 imm:$imm))),
> - (SHUFPDrmi VR128:$src1, addr:$src2, imm:$imm)>;
> def : Pat<(v2i64 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
> (SHUFPDrri VR128:$src1, VR128:$src2, imm:$imm)>;
> - def : Pat<(v2f64 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
> - (SHUFPDrri VR128:$src1, VR128:$src2, imm:$imm)>;
> }
>
> //===----------------------------------------------------------------------===//
>
>
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