[llvm-commits] [llvm] r150261 - in /llvm/trunk: include/llvm/CodeGen/MachineOperand.h lib/CodeGen/InterferenceCache.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Fri Feb 10 13:23:53 2012
New Revision: 150261

URL: http://llvm.org/viewvc/llvm-project?rev=150261&view=rev
Log:
Add a static MachineOperand::clobbersPhysReg().

It can be necessary to detach a register mask pointer from its
MachineOperand. This method is convenient for checking clobbered
physregs on a detached bitmask pointer.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineOperand.h
    llvm/trunk/lib/CodeGen/InterferenceCache.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineOperand.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineOperand.h?rev=150261&r1=150260&r2=150261&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineOperand.h Fri Feb 10 13:23:53 2012
@@ -441,12 +441,20 @@
     return Contents.OffsetedInfo.Val.SymbolName;
   }
 
-  /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
-  bool clobbersPhysReg(unsigned PhysReg) const {
-    assert(isRegMask() && "Wrong MachineOperand accessor");
+  /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
+  /// It is sometimes necessary to detach the register mask pointer from its
+  /// machine operand. This static method can be used for such detached bit
+  /// mask pointers.  clobbersPhysReg - Returns true if this RegMask operand
+  /// clobbers PhysReg.
+  static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
     // See TargetRegisterInfo.h.
     assert(PhysReg < (1u << 30) && "Not a physical register");
-    return !(Contents.RegMask[PhysReg / 32] & (1u << PhysReg % 32));
+    return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
+  }
+
+  /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
+  bool clobbersPhysReg(unsigned PhysReg) const {
+     return clobbersPhysReg(getRegMask(), PhysReg);
   }
 
   /// getRegMask - Returns a bit mask of registers preserved by this RegMask

Modified: llvm/trunk/lib/CodeGen/InterferenceCache.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InterferenceCache.cpp?rev=150261&r1=150260&r2=150261&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/InterferenceCache.cpp (original)
+++ llvm/trunk/lib/CodeGen/InterferenceCache.cpp Fri Feb 10 13:23:53 2012
@@ -106,11 +106,6 @@
   return i == e;
 }
 
-// Test if a register mask clobbers PhysReg.
-static inline bool maskClobber(const uint32_t *Mask, unsigned PhysReg) {
-  return !(Mask[PhysReg/32] & (1u << PhysReg%32));
-}
-
 void InterferenceCache::Entry::update(unsigned MBBNum) {
   SlotIndex Start, Stop;
   tie(Start, Stop) = Indexes->getMBBRange(MBBNum);
@@ -152,7 +147,7 @@
     SlotIndex Limit = BI->First.isValid() ? BI->First : Stop;
     for (unsigned i = 0, e = RegMaskSlots.size();
          i != e && RegMaskSlots[i] < Limit; ++i)
-      if (maskClobber(RegMaskBits[i], PhysReg)) {
+      if (MachineOperand::clobbersPhysReg(RegMaskBits[i], PhysReg)) {
         // Register mask i clobbers PhysReg before the LIU interference.
         BI->First = RegMaskSlots[i];
         break;
@@ -191,7 +186,7 @@
   // Also check for register mask interference.
   SlotIndex Limit = BI->Last.isValid() ? BI->Last : Start;
   for (unsigned i = RegMaskSlots.size(); i && RegMaskSlots[i-1] > Limit; --i)
-    if (maskClobber(RegMaskBits[i-1], PhysReg)) {
+    if (MachineOperand::clobbersPhysReg(RegMaskBits[i-1], PhysReg)) {
       // Register mask i-1 clobbers PhysReg after the LIU interference.
       // Model the regmask clobber as a dead def.
       BI->Last = RegMaskSlots[i-1].getDeadSlot();