[llvm-commits] [llvm] r150116 - /llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Wed Feb  8 18:15:39 2012
New Revision: 150116

URL: http://llvm.org/viewvc/llvm-project?rev=150116&view=rev
Log:
Never delete instructions that define reserved registers.

I think this was already the intention, but DeadMachineInstructionElim
was accidentally tracking the liveness of reserved registers. Now,
instructions with reserved defs are never deleted.

This prevents the call stack adjustment instructions from getting
deleted when enabling register masks.

Modified:
    llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp

Modified: llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp?rev=150116&r1=150115&r2=150116&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp (original)
+++ llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp Wed Feb  8 18:15:39 2012
@@ -33,6 +33,7 @@
     const MachineRegisterInfo *MRI;
     const TargetInstrInfo *TII;
     BitVector LivePhysRegs;
+    BitVector ReservedRegs;
 
   public:
     static char ID; // Pass identification, replacement for typeid
@@ -67,10 +68,14 @@
     const MachineOperand &MO = MI->getOperand(i);
     if (MO.isReg() && MO.isDef()) {
       unsigned Reg = MO.getReg();
-      if (TargetRegisterInfo::isPhysicalRegister(Reg) ?
-          LivePhysRegs[Reg] : !MRI->use_nodbg_empty(Reg)) {
-        // This def has a non-debug use. Don't delete the instruction!
-        return false;
+      if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
+        // Don't delete live physreg defs, or any reserved register defs.
+        if (LivePhysRegs.test(Reg) || ReservedRegs.test(Reg))
+          return false;
+      } else {
+        if (!MRI->use_nodbg_empty(Reg))
+          // This def has a non-debug use. Don't delete the instruction!
+          return false;
       }
     }
   }
@@ -86,7 +91,7 @@
   TII = MF.getTarget().getInstrInfo();
 
   // Treat reserved registers as always live.
-  BitVector ReservedRegs = TRI->getReservedRegs(MF);
+  ReservedRegs = TRI->getReservedRegs(MF);
 
   // Loop over all instructions in all blocks, from bottom to top, so that it's
   // more likely that chains of dependent but ultimately dead instructions will
@@ -173,7 +178,6 @@
         } else if (MO.isRegMask()) {
           // Register mask of preserved registers. All clobbers are dead.
           LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
-          LivePhysRegs |= ReservedRegs;
         }
       }
       // Record the physreg uses, after the defs, in case a physreg is