[llvm-commits] [llvm] r150099 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/MachineLICM.cpp lib/CodeGen/Passes.cpp

Andrew Trick atrick at apple.com
Wed Feb 8 13:23:04 PST 2012


Author: atrick
Date: Wed Feb  8 15:23:03 2012
New Revision: 150099

URL: http://llvm.org/viewvc/llvm-project?rev=150099&view=rev
Log:
Move pass configuration out of pass constructors: MachineLICM.

Modified:
    llvm/trunk/include/llvm/CodeGen/Passes.h
    llvm/trunk/lib/CodeGen/MachineLICM.cpp
    llvm/trunk/lib/CodeGen/Passes.cpp

Modified: llvm/trunk/include/llvm/CodeGen/Passes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=150099&r1=150098&r2=150099&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/Passes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Feb  8 15:23:03 2012
@@ -93,6 +93,7 @@
   /// Add the complete, standard set of LLVM CodeGen passes.
   /// Fully developed targets will not generally override this.
   virtual void addMachinePasses();
+
 protected:
   // Helper to verify the analysis is really immutable.
   void setOpt(bool &Opt, bool Val);
@@ -323,7 +324,7 @@
 
   /// createMachineLICMPass - This pass performs LICM on machine instructions.
   ///
-  FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
+  FunctionPass *createMachineLICMPass();
 
   /// createMachineSinkingPass - This pass performs sinking on machine
   /// instructions.

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=150099&r1=150098&r2=150099&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Feb  8 15:23:03 2012
@@ -60,8 +60,6 @@
 
 namespace {
   class MachineLICM : public MachineFunctionPass {
-    bool PreRegAlloc;
-
     const TargetMachine   *TM;
     const TargetInstrInfo *TII;
     const TargetLowering *TLI;
@@ -69,6 +67,7 @@
     const MachineFrameInfo *MFI;
     MachineRegisterInfo *MRI;
     const InstrItineraryData *InstrItins;
+    bool PreRegAlloc;
 
     // Various analyses that we use...
     AliasAnalysis        *AA;      // Alias analysis info.
@@ -298,8 +297,8 @@
 INITIALIZE_PASS_END(MachineLICM, "machinelicm",
                 "Machine Loop Invariant Code Motion", false, false)
 
-FunctionPass *llvm::createMachineLICMPass(bool PreRegAlloc) {
-  return new MachineLICM(PreRegAlloc);
+FunctionPass *llvm::createMachineLICMPass() {
+  return new MachineLICM();
 }
 
 /// LoopIsOuterMostWithPredecessor - Test if the given loop is the outer-most
@@ -332,6 +331,8 @@
   MRI = &MF.getRegInfo();
   InstrItins = TM->getInstrItineraryData();
 
+  PreRegAlloc = MRI->isSSA();
+
   if (PreRegAlloc) {
     // Estimate register pressure during pre-regalloc pass.
     unsigned NumRC = TRI->getNumRegClasses();

Modified: llvm/trunk/lib/CodeGen/Passes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Passes.cpp?rev=150099&r1=150098&r2=150099&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/Passes.cpp (original)
+++ llvm/trunk/lib/CodeGen/Passes.cpp Wed Feb  8 15:23:03 2012
@@ -244,7 +244,7 @@
 
     // Run post-ra machine LICM to hoist reloads / remats.
     if (!DisablePostRAMachineLICM)
-      PM.add(createMachineLICMPass(false));
+      PM.add(createMachineLICMPass());
 
     printAndVerify("After StackSlotColoring and postra Machine LICM");
   }





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