[llvm-commits] LLVM patch to support ARM fused multiply add/subtract instructions
James Molloy
james.molloy at arm.com
Tue Jan 24 01:23:09 PST 2012
Hi Anton,
Both VFPv3 and NEONv1 can have the fp16 extension.
Cheers,
James
-----Original Message-----
From: Anton Korobeynikov [mailto:anton at korobeynikov.info]
Sent: 24 January 2012 09:10
To: James Molloy
Cc: Ana Pazos; rajav at codeaurora.org; llvm-commits at cs.uiuc.edu
Subject: Re: [llvm-commits] LLVM patch to support ARM fused multiply add/subtract instructions
> Also, the patch doesn't hook the VMLAs up to "Requires<[UseFPVMLx]>" - is there any reason for this? I know that flag isn't really used but when we do hook VMLAs up to fast-math or disable-excess-fp-precision, it'd be nice to have all implementations orthogonal.
I think we reached the point where we should have a clean set of
features. Given the mess we have already....
So, let's summarize. We have the following set of target features:
VFPvN {N=2,3,4}
NEON (do we need NEONv2?)
UseFPVMLx, flag to enable codegen in excess precision.
Anything else here?
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
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