[llvm-commits] [llvm] r148737 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/X86/intel-syntax.s

[Devang Patel]

Author: dpatel
Date: Mon Jan 23 16:35:25 2012
New Revision: 148737

URL: http://llvm.org/viewvc/llvm-project?rev=148737&view=rev
Log:
Intel syntax: Robustify parsing of memory operand's displacement experssion.

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/test/MC/X86/intel-syntax.s

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=148737&r1=148736&r2=148737&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon Jan 23 16:35:25 2012
@@ -655,8 +655,13 @@
         Disp = isPlus ? ValExpr : MCConstantExpr::Create(0-Val, getContext());
       } else
         return ErrorOperand(PlusLoc, "unexpected token after +");
-    } else if (getLexer().is(AsmToken::Identifier))
-      ParseRegister(IndexReg, Start, End);
+    } else if (getLexer().is(AsmToken::Identifier)) {
+      // This could be an index registor or a displacement expression.
+      End = Parser.getTok().getLoc();
+      if (!IndexReg)
+        ParseRegister(IndexReg, Start, End);
+      else if (getParser().ParseExpression(Disp, End)) return 0;        
+    }
   }
 
   if (getLexer().isNot(AsmToken::RBrac))

Modified: llvm/trunk/test/MC/X86/intel-syntax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax.s?rev=148737&r1=148736&r2=148737&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax.s (original)
+++ llvm/trunk/test/MC/X86/intel-syntax.s Mon Jan 23 16:35:25 2012
@@ -56,7 +56,9 @@
 // CHECK:	fld	%st(0)
 	fld	ST(0)
 // CHECK:	movl	%fs:(%rdi), %eax
-mov     EAX, DWORD PTR FS:[RDI]
+        mov     EAX, DWORD PTR FS:[RDI]
 // CHECK:	leal	(,%rdi,4), %r8d
-lea     R8D, DWORD PTR [4*RDI]        
+        lea     R8D, DWORD PTR [4*RDI]
+// CHECK:        movl    _fnan(,%ecx,4), %ecx
+        mov     ECX, DWORD PTR [4*ECX + _fnan]
 	ret