[llvm-commits] [llvm] r148712 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/X86/intel-syntax.s

[Devang Patel]

Author: dpatel
Date: Mon Jan 23 12:31:58 2012
New Revision: 148712

URL: http://llvm.org/viewvc/llvm-project?rev=148712&view=rev
Log:
Intel syntax: Parse segment registers.

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/test/MC/X86/intel-syntax.s

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=148712&r1=148711&r2=148712&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon Jan 23 12:31:58 2012
@@ -54,7 +54,7 @@
   X86Operand *ParseATTOperand();
   X86Operand *ParseIntelOperand();
   X86Operand *ParseIntelMemOperand();
-  X86Operand *ParseIntelBracExpression(unsigned Size);
+  X86Operand *ParseIntelBracExpression(unsigned SegReg, unsigned Size);
   X86Operand *ParseMemOperand(unsigned SegReg, SMLoc StartLoc);
 
   bool ParseDirectiveWord(unsigned Size, SMLoc L);
@@ -593,8 +593,9 @@
   return Size;
 }
 
-X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned Size) {
-  unsigned SegReg = 0, BaseReg = 0, IndexReg = 0, Scale = 1;
+X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
+                                                   unsigned Size) {
+  unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
   SMLoc Start = Parser.getTok().getLoc(), End;
 
   const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext());
@@ -669,6 +670,7 @@
 X86Operand *X86AsmParser::ParseIntelMemOperand() {
   const AsmToken &Tok = Parser.getTok();
   SMLoc Start = Parser.getTok().getLoc(), End;
+  unsigned SegReg = 0;
 
   unsigned Size = getIntelMemOperandSize(Tok.getString());
   if (Size) {
@@ -678,7 +680,17 @@
   }
 
   if (getLexer().is(AsmToken::LBrac))
-    return ParseIntelBracExpression(Size);
+    return ParseIntelBracExpression(SegReg, Size);
+
+  if (!ParseRegister(SegReg, Start, End)) {
+    // Handel SegReg : [ ... ]
+    if (getLexer().isNot(AsmToken::Colon))
+      return ErrorOperand(Start, "Expected ':' token!");
+    Parser.Lex(); // Eat :
+    if (getLexer().isNot(AsmToken::LBrac))
+      return ErrorOperand(Start, "Expected '[' token!");
+    return ParseIntelBracExpression(SegReg, Size);
+  }
 
   const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext());
   if (getParser().ParseExpression(Disp, End)) return 0;

Modified: llvm/trunk/test/MC/X86/intel-syntax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax.s?rev=148712&r1=148711&r2=148712&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax.s (original)
+++ llvm/trunk/test/MC/X86/intel-syntax.s Mon Jan 23 12:31:58 2012
@@ -55,4 +55,6 @@
 	and	rax, -257
 // CHECK:	fld	%st(0)
 	fld	ST(0)
+// CHECK:	movl	%fs:(%rdi), %eax
+mov     EAX, DWORD PTR FS:[RDI]        
 	ret