[llvm-commits] [llvm] r148411 - /llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h

Nadav Rotem nadav.rotem at intel.com
Wed Jan 18 12:50:30 PST 2012


Author: nadav
Date: Wed Jan 18 14:50:30 2012
New Revision: 148411

URL: http://llvm.org/viewvc/llvm-project?rev=148411&view=rev
Log:
Document the fact that the selection dag changes the vselect condition type

Modified:
    llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h

Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=148411&r1=148410&r2=148411&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Wed Jan 18 14:50:30 2012
@@ -323,6 +323,9 @@
     // and #2), returning a vector result.  All vectors have the same length.
     // Much like the scalar select and setcc, each bit in the condition selects
     // whether the corresponding result element is taken from op #1 or op #2.
+    // At first, the VSELECT condition is of vXi1 type. Later, targets may change
+    // the condition type in order to match the VSELECT node using a a pattern.
+    // The condition follows the BooleanContent format of the target.
     VSELECT,
 
     // Select with condition operator - This selects between a true value and





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