[llvm-commits] [llvm] r147957 - in /llvm/trunk: lib/Target/X86/X86ISelDAGToDAG.cpp test/CodeGen/X86/fold-and-shift.ll

[Chandler Carruth]

Author: chandlerc
Date: Wed Jan 11 12:36:12 2012
New Revision: 147957

URL: http://llvm.org/viewvc/llvm-project?rev=147957&view=rev
Log:
Revert r147945 which disabled an addressing mode transformation. I had
hoped this would revive one of the llvm-gcc selfhost build bots, but it
didn't so it doesn't appear that my transform is the culprit.

If anyone else is seeing failures, please let me know!

Modified:
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
    llvm/trunk/test/CodeGen/X86/fold-and-shift.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=147957&r1=147956&r2=147957&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Jan 11 12:36:12 2012
@@ -847,10 +847,6 @@
                                     uint64_t Mask,
                                     SDValue Shift, SDValue X,
                                     X86ISelAddressMode &AM) {
-  // FIXME!! Hack to disable this and see if it is responsible for a miscompile
-  // on llvm-gcc's selfhost.
-  return true;
-
   if (Shift.getOpcode() != ISD::SRL || !Shift.hasOneUse() ||
       !isa<ConstantSDNode>(Shift.getOperand(1)))
     return true;

Modified: llvm/trunk/test/CodeGen/X86/fold-and-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-and-shift.ll?rev=147957&r1=147956&r2=147957&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-and-shift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-and-shift.ll Wed Jan 11 12:36:12 2012
@@ -39,11 +39,11 @@
 ; To make matters worse, because of the two-phase zext of %i and their reuse in
 ; the function, the DAG can get confusing trying to re-use both of them and
 ; prevent easy analysis of the mask in order to match this.
-; BROKEN: t3:
-; BROKEN-NOT: and
-; BROKEN: shrl
-; BROKEN: addl (%{{...}},%{{...}},4),
-; BROKEN: ret
+; CHECK: t3:
+; CHECK-NOT: and
+; CHECK: shrl
+; CHECK: addl (%{{...}},%{{...}},4),
+; CHECK: ret
 
 entry:
   %i = load i16* %i.ptr
@@ -58,11 +58,11 @@
 define i32 @t4(i16* %i.ptr, i32* %arr) {
 ; A version of @t3 that has more zero extends and more re-use of intermediate
 ; values. This exercise slightly different bits of canonicalization.
-; BROKEN: t4:
-; BROKEN-NOT: and
-; BROKEN: shrl
-; BROKEN: addl (%{{...}},%{{...}},4),
-; BROKEN: ret
+; CHECK: t4:
+; CHECK-NOT: and
+; CHECK: shrl
+; CHECK: addl (%{{...}},%{{...}},4),
+; CHECK: ret
 
 entry:
   %i = load i16* %i.ptr