[llvm-commits] PATCH: Teach the x86 backend to fold mask & shift patterns into an addressing mode computation

[Chandler Carruth]

Hello,

This is still a pretty rough patch, but I'd like some feedback on its
approach and potentially to commit a cleaned up version of it as the first
increment of my work here.

Essentially, this is a puzzle that hooked my interesting when I looked at
how some decompression software (code.google.com/p/snappy) was compiled by
LLVM. Turns out there was a really clever trick that was important to
performance: rather than forming shift+and+load chains (where the load is
part of some other instruction that operates on memory), you can fold the
and into the addressing mode in some cases. This is already done in a few
places in LLVM, but there are others where it is missed. Doing this is
particularly advantageous because it shrinks the dependency chain as well.
On a few benchmarks I saw significantly fewer stalls as a result of this
transform.

One complication (that you'll see in the patch) is that we also need to be
very good at canonicalizing shifts, zexts, and truncates (which turn into
components of a mask) to ensure that the information needed to match this
is available and in the correct form when the code hits the isel logic I've
added. There are still some missing DAGCombine fixes in this area that I'm
tracking down, but one of them is already implemented here and necessary
for the test I've added.
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