[llvm-commits] [llvm] r147487 - in /llvm/trunk: lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseRegisterInfo.cpp test/CodeGen/ARM/fast-isel-deadcode.ll test/CodeGen/Thumb2/aligned-spill.ll

Jakob Stoklund Olesen stoklund at 2pi.dk
Tue Jan 3 14:34:36 PST 2012


Author: stoklund
Date: Tue Jan  3 16:34:35 2012
New Revision: 147487

URL: http://llvm.org/viewvc/llvm-project?rev=147487&view=rev
Log:
Revert r146997, "Heed spill slot alignment on ARM."

This patch caused a miscompilation of oggenc because a frame pointer was
suddenly needed halfway through register allocation.

<rdar://problem/10625436>

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
    llvm/trunk/test/CodeGen/ARM/fast-isel-deadcode.ll
    llvm/trunk/test/CodeGen/Thumb2/aligned-spill.ll

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=147487&r1=147486&r2=147487&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Jan  3 16:34:35 2012
@@ -765,8 +765,7 @@
       break;
     case 16:
       if (ARM::QPRRegClass.hasSubClassEq(RC)) {
-        // Use aligned spills if the stack can be realigned.
-        if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) {
+        if (Align >= 16 && getRegisterInfo().needsStackRealignment(MF)) {
           AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VST1q64Pseudo))
                      .addFrameIndex(FI).addImm(16)
                      .addReg(SrcReg, getKillRegState(isKill))
@@ -915,7 +914,7 @@
     break;
   case 16:
     if (ARM::QPRRegClass.hasSubClassEq(RC)) {
-      if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) {
+      if (Align >= 16 && getRegisterInfo().needsStackRealignment(MF)) {
         AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLD1q64Pseudo), DestReg)
                      .addFrameIndex(FI).addImm(16)
                      .addMemOperand(MMO));

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=147487&r1=147486&r2=147487&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Tue Jan  3 16:34:35 2012
@@ -542,7 +542,7 @@
   const MachineFrameInfo *MFI = MF.getFrameInfo();
   const Function *F = MF.getFunction();
   unsigned StackAlign = MF.getTarget().getFrameLowering()->getStackAlignment();
-  bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
+  bool requiresRealignment = ((MFI->getLocalFrameMaxAlign() > StackAlign) ||
                                F->hasFnAttr(Attribute::StackAlignment));
 
   return requiresRealignment && canRealignStack(MF);

Modified: llvm/trunk/test/CodeGen/ARM/fast-isel-deadcode.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel-deadcode.ll?rev=147487&r1=147486&r2=147487&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fast-isel-deadcode.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fast-isel-deadcode.ll Tue Jan  3 16:34:35 2012
@@ -15,7 +15,8 @@
 ; THUMB-NOT: sxtb
 ; THUMB: movs r0, #0
 ; THUMB: movt r0, #0
-; THUMB: pop
+; THUMB: add sp, #32
+; THUMb: pop {r7, pc}
   ret i32 0
 }
 

Modified: llvm/trunk/test/CodeGen/Thumb2/aligned-spill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/aligned-spill.ll?rev=147487&r1=147486&r2=147487&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/aligned-spill.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/aligned-spill.ll Tue Jan  3 16:34:35 2012
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=cortex-a8 | FileCheck %s
+; DONT: llc < %s -mcpu=cortex-a8 | FileCheck %s
 ; RUN: llc < %s -mcpu=cortex-a8 -align-neon-spills | FileCheck %s --check-prefix=NEON
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
 target triple = "thumbv7-apple-ios"





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