[llvm-commits] X86SSELevel for AVX architecture

Demikhovsky, Elena elena.demikhovsky at intel.com
Mon Jan 2 00:18:18 PST 2012


I think that “HasAVX” should always cover “HasSSE42” and “HasSSE42orAVX” is redundant in this case.
And “HasAVX2” will cover “HasAVX”.
I propose to change in X86Subtarget constructor from:
  if (HasAVX)
    X86SSELevel = NoMMXSSE;

to
  if (HasAVX)
    X86SSELevel = SSE42;

- Elena
From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Craig Topper
Sent: Sunday, January 01, 2012 21:56
To: Umansky, Victor
Cc: llvm-commits at cs.uiuc.edu
Subject: Re: [llvm-commits] X86SSELevel for AVX architecture

Missed the CRC32 instructions. They have now been fixed in r147411.
On Sun, Jan 1, 2012 at 1:44 PM, Craig Topper <craig.topper at gmail.com<mailto:craig.topper at gmail.com>> wrote:
Fixed sfence, mfence, lfence, clflush, monitor, and mwait in r147409.

On Sun, Jan 1, 2012 at 1:06 PM, Craig Topper <craig.topper at gmail.com<mailto:craig.topper at gmail.com>> wrote:
This is similar to the fix for the prefetch instruction in r146163. I think the fence instructions and clflush are similarly broken. I'll see if I can find any others and I'll commit a fix.
On Sun, Jan 1, 2012 at 10:18 AM, Umansky, Victor <victor.umansky at intel.com<mailto:victor.umansky at intel.com>> wrote:
Hi Evan,

I noticed that in X86Subtarget constructor you set ‘X86SSELevel’ member of the class as  ‘NoMMXSSE’ in the case when  HasAVX member is set to ‘true’.
Effectively that invalidates SSE features for AVX architecture - because hasSSEn() accessors return ‘false’ when HasAVXn() is ‘true’.
I wonder whether this is the behavior which you’d like to enforce – as conceptually AVX architecture complements SSE rather than replaces it completely.

I noticed this problem after discovering that LLVM fails to lower “sse2.fence” intrinsic when generating a code for AVX architecture – because this intrinsic is conditioned on hasSSE2() being ‘true’.
Is that case was somehow missed from regression testing, or there is another way to lower that intrinsic?

I’d appreciate your clarifications.

Best Regards,
     Victor Umansky

---------------------------------------------------------------------
Intel Israel (74) Limited

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.

_______________________________________________
llvm-commits mailing list
llvm-commits at cs.uiuc.edu<mailto:llvm-commits at cs.uiuc.edu>
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



--
~Craig


--
~Craig



--
~Craig
---------------------------------------------------------------------
Intel Israel (74) Limited

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20120102/073cacaf/attachment.html>


More information about the llvm-commits mailing list