[llvm-commits] [llvm] r147391 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll

[Duncan Sands]

Hi Nick,

>>> @@ -603,9 +602,16 @@
>>> // (X>>? C1)<< C2 --> X>>? (C1-C2)& (-1<< C2)
>>> if (I.getOpcode() == Instruction::Shl&&
>>> ShiftOp->getOpcode() != Instruction::Shl) {
>>> - Value *Shift = Builder->CreateBinOp(ShiftOp->getOpcode(), X,
>>> - ConstantInt::get(Ty, ShiftDiff));
>>> -
>>> + ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
>>> + if (ShiftOp->isExact()) {
>>> + // (X>>?exact C1)<< C2 --> X>>?exact (C1-C2)
>>
>> what happens if C2 is bigger than C1?
>
> We won't reach here. It extracts C1 and C2 into ShiftAmt1 and ShiftAmt2 and does
> if (ShiftAmt1 == ShiftAmt2) { ... } else if (ShiftAmt1 < ShiftAmt2) { ... } else
> { our transform here }.

OK, thanks.  However if C2 is bigger than C1 then, thanks to the exact flag, you
can just turn it into a left shift (without an "and").  Likewise, for C1 == C2
the pair of shifts becomes a no-op.  But maybe those are handled already?

Ciao, Duncan.

>
> Nick
>
>>
>> Ciao, Duncan.
>>
>>> + BinaryOperator *NewShr = BinaryOperator::Create(ShiftOp->getOpcode(),
>>> + X, ShiftDiffCst);
>>> + NewShr->setIsExact(true);
>>> + return NewShr;
>>> + }
>>> + Value *Shift = Builder->CreateBinOp(ShiftOp->getOpcode(),
>>> + X, ShiftDiffCst);
>>> APInt Mask(APInt::getHighBitsSet(TypeBits, TypeBits - ShiftAmt2));
>>> return BinaryOperator::CreateAnd(Shift,
>>> ConstantInt::get(I.getContext(),Mask));
>>>
>>> Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=147391&r1=147390&r2=147391&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original)
>>> +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Sat Dec 31 15:30:22 2011
>>> @@ -542,3 +542,21 @@
>>> ; CHECK-NEXT: %y = lshr i32 %a, 5
>>> ; CHECK-NEXT: ret i32 %y
>>> }
>>> +
>>> +define i32 @test46(i32 %a) {
>>> + %y = ashr exact i32 %a, 3
>>> + %z = shl i32 %y, 1
>>> + ret i32 %z
>>> +; CHECK: @test46
>>> +; CHECK-NEXT: %z = ashr exact i32 %a, 2
>>> +; CHECK-NEXT: ret i32 %z
>>> +}
>>> +
>>> +define i32 @test47(i32 %a) {
>>> + %y = lshr exact i32 %a, 3
>>> + %z = shl i32 %y, 1
>>> + ret i32 %z
>>> +; CHECK: @test47
>>> +; CHECK-NEXT: %z = lshr exact i32 %a, 2
>>> +; CHECK-NEXT: ret i32 %z
>>> +}
>>>
>>>
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