[llvm-commits] [llvm] r147235 - /llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
Akira Hatanaka
ahatanaka at mips.com
Fri Dec 23 19:11:18 PST 2011
Author: ahatanak
Date: Fri Dec 23 21:11:18 2011
New Revision: 147235
URL: http://llvm.org/viewvc/llvm-project?rev=147235&view=rev
Log:
Add MachineMemOperands to instructions generated in storeRegToStackSlot or
loadRegFromStackSlot.
Modified:
llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp?rev=147235&r1=147234&r2=147235&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Fri Dec 23 21:11:18 2011
@@ -168,6 +168,16 @@
MIB.addReg(SrcReg, getKillRegState(KillSrc));
}
+static MachineMemOperand* GetMemOperand(MachineBasicBlock &MBB, int FI,
+ unsigned Flag) {
+ MachineFunction &MF = *MBB.getParent();
+ MachineFrameInfo &MFI = *MF.getFrameInfo();
+ unsigned Align = MFI.getObjectAlignment(FI);
+
+ return MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI), Flag,
+ MFI.getObjectSize(FI), Align);
+}
+
void MipsInstrInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SrcReg, bool isKill, int FI,
@@ -175,6 +185,8 @@
const TargetRegisterInfo *TRI) const {
DebugLoc DL;
if (I != MBB.end()) DL = I->getDebugLoc();
+ MachineMemOperand *MMO = GetMemOperand(MBB, FI, MachineMemOperand::MOStore);
+
unsigned Opc = 0;
if (RC == Mips::CPURegsRegisterClass)
@@ -190,7 +202,7 @@
assert(Opc && "Register class not handled!");
BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))
- .addFrameIndex(FI).addImm(0);
+ .addFrameIndex(FI).addImm(0).addMemOperand(MMO);
}
void MipsInstrInfo::
@@ -201,6 +213,7 @@
{
DebugLoc DL;
if (I != MBB.end()) DL = I->getDebugLoc();
+ MachineMemOperand *MMO = GetMemOperand(MBB, FI, MachineMemOperand::MOLoad);
unsigned Opc = 0;
if (RC == Mips::CPURegsRegisterClass)
@@ -215,7 +228,8 @@
Opc = IsN64 ? Mips::LDC164_P8 : Mips::LDC164;
assert(Opc && "Register class not handled!");
- BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(0);
+ BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(0)
+ .addMemOperand(MMO);
}
MachineInstr*
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