[llvm-commits] [PATCH] Allow SelectionDAGBuilder to reorder loads past stores

[Hal Finkel]

It turns out that a significant cause of the performance regressions
caused by this patch are related to this issue: with the patch applied
the scheduler is now free to schedule many more things, especially
stores, after calls (especially intrinsics that are expanded to lib
calls). This tendency is bad because of the spilling necessary to cross
the call boundary. I am working on a proposed solution, and I'll post an
updated patch soon.

Thanks again,
Hal

On Tue, 2011-12-20 at 12:52 -0600, Hal Finkel wrote:
> On Tue, 2011-12-20 at 10:44 -0800, Jakob Stoklund Olesen wrote:
> > On Dec 20, 2011, at 9:22 AM, Hal Finkel wrote:
> > 
> > > when I later look at the register map, only XMM0 and XMM1 are ever
> > > assigned to vregs, everything else is spilled. This is wrong. Do you
> > > have any ideas on what could be going wrong or other things I should
> > > examine? Could the register allocator not be accounting correctly for
> > > callee-saved registers when computing live-interval interference
> > > information?
> > 
> > There are no callee-saved xmm registers.
> 
> Thanks! I was mixing up the Win64 calling convention with the regular
> one. That explains things, so, I suppose the right thing to do is to
> make sure all stores are flushed before any call (which I think it
> already does), and any intrinsic that will be expanded (which it will
> not currently do).
> 
>  -Hal
> 
> > 
> > /jakob
> > 
> 

-- 
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory