[llvm-commits] [llvm] r146026 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/MC/ lib/CodeGen/ lib/CodeGen/AsmPrinter/ lib/CodeGen/SelectionDAG/ lib/ExecutionEngine/JIT/ lib/Target/ lib/Target/ARM/ lib/Target/MBlaze/ lib/Target/MSP430/ lib/T

Nick Lewycky nlewycky at google.com
Thu Dec 8 15:43:47 PST 2011


On 6 December 2011 23:15, Evan Cheng <evan.cheng at apple.com> wrote:
> Author: evancheng
> Date: Wed Dec  7 01:15:52 2011
> New Revision: 146026
>
> URL: http://llvm.org/viewvc/llvm-project?rev=146026&view=rev
> Log:
> Add bundle aware API for querying instruction properties and switch the code
> generator to it. For non-bundle instructions, these behave exactly the same
> as the MC layer API.
>
> For properties like mayLoad / mayStore, look into the bundle and if any of the
> bundled instructions has the property it would return true.
> For properties like isPredicable, only return true if *all* of the bundled
> instructions have the property.
> For properties like canFoldAsLoad, isCompare, conservatively return false for
> bundles.
>
> Modified:
>    llvm/trunk/include/llvm/CodeGen/MachineInstr.h
>    llvm/trunk/include/llvm/MC/MCInstrDesc.h
>    llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp
>    llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
>    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp
>    llvm/trunk/lib/CodeGen/BranchFolding.cpp
>    llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp
>    llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp
>    llvm/trunk/lib/CodeGen/ExecutionDepsFix.cpp
>    llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp
>    llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp
>    llvm/trunk/lib/CodeGen/GCStrategy.cpp
>    llvm/trunk/lib/CodeGen/IfConversion.cpp
>    llvm/trunk/lib/CodeGen/InlineSpiller.cpp
>    llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
>    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
>    llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
>    llvm/trunk/lib/CodeGen/LiveVariables.cpp
>    llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
>    llvm/trunk/lib/CodeGen/MachineCSE.cpp
>    llvm/trunk/lib/CodeGen/MachineInstr.cpp
>    llvm/trunk/lib/CodeGen/MachineLICM.cpp
>    llvm/trunk/lib/CodeGen/MachineSink.cpp
>    llvm/trunk/lib/CodeGen/MachineVerifier.cpp
>    llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
>    llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
>    llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
>    llvm/trunk/lib/CodeGen/RegAllocFast.cpp
>    llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
>    llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
>    llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
>    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
>    llvm/trunk/lib/CodeGen/ShrinkWrapping.cpp
>    llvm/trunk/lib/CodeGen/SplitKit.cpp
>    llvm/trunk/lib/CodeGen/TailDuplication.cpp
>    llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp
>    llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
>    llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp
>    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
>    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
>    llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
>    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
>    llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp
>    llvm/trunk/lib/Target/ARM/ARMHazardRecognizer.cpp
>    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>    llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
>    llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp
>    llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp
>    llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
>    llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp
>    llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
>    llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
>    llvm/trunk/lib/Target/MSP430/MSP430FrameLowering.cpp
>    llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
>    llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
>    llvm/trunk/lib/Target/Mips/MipsCodeEmitter.cpp
>    llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp
>    llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp
>    llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
>    llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
>    llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp
>    llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp
>    llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
>    llvm/trunk/lib/Target/TargetInstrInfo.cpp
>    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
>    llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
>    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
>    llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
>    llvm/trunk/lib/Target/X86/X86VZeroUpper.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=146026&r1=146025&r2=146026&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Wed Dec  7 01:15:52 2011
> @@ -274,14 +274,267 @@
>     return MemRefsEnd - MemRefs == 1;
>   }
>
> -  /// API for querying MachineInstr properties. These are bundle aware.
> +  /// API for querying MachineInstr properties. They are the same as MCInstrDesc
> +  /// queries but they are bundle aware.
> +
> +  /// hasProperty - Return true if the instruction (or in the case of a bundle,
> +  /// the instructions inside the bundle) has the specified property.
> +  /// The first argument is the property being queried.
> +  /// The second argument indicates whether the query should look inside
> +  /// instruction bundles.
> +  /// If the third argument is true, than the query can return true when *any*
> +  /// of the bundled instructions has the queried property. If it's false, then
> +  /// this can return true iff *all* of the instructions have the property.
> +  bool hasProperty(unsigned Flag,
> +                   bool PeekInBundle = true, bool IsOr = true) const;

This is implemented in lib/CodeGen/MachineInstr.cpp ...

> +  /// isBarrier - Returns true if the specified instruction stops control flow
> +  /// from executing the instruction immediately following it.  Examples include
> +  /// unconditional branches and return instructions.
> +  bool isBarrier() const {
> +    return hasProperty(MCID::Barrier);
> +  }

... and this is called from lib/Target/TargetInstrInfo.cpp.

You've created a new dependency from target upon codegen, but codegen
already depends on Target. Please fix this dependency cycle!

Nick




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